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aspeed: i2c: Add new mode support

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On AST2600, I2C has a secondary mode, called "new mode", which changes
the layout of registers, adds some minor behavior changes, and
introduces a new way to transfer data called "packet mode".

Most of the bit positions of the fields are the same between old and new
mode, so we use SHARED_FIELD_XX macros to reuse most of the code between
the different modes.

For packet mode, most of the command behavior is the same compared to
other modes, but there are some minor changes to how interrupts are
handled compared to other modes.

Signed-off-by: Joe Komlodi <komlodi@google.com>
Change-Id: I072f8301964f623afc74af1fe50c12e5caef199e
Message-Id: <20220331043248.2237838-6-komlodi@google.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
This commit is contained in:
Joe Komlodi 2022-06-13 14:05:48 +02:00 committed by Cédric Le Goater
parent 2260fc6ff3
commit ba2cccd64e
2 changed files with 650 additions and 192 deletions
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838
hw/i2c/aspeed_i2c.c
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File diff suppressed because it is too large Load Diff

4
include/hw/i2c/aspeed_i2c.h
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@ -34,6 +34,7 @@ OBJECT_DECLARE_TYPE(AspeedI2CState, AspeedI2CClass, ASPEED_I2C)
#define ASPEED_I2C_NR_BUSSES 16
#define ASPEED_I2C_MAX_POOL_SIZE 0x800
#define ASPEED_I2C_OLD_NUM_REG 11
#define ASPEED_I2C_NEW_NUM_REG 22
struct AspeedI2CState;
@ -50,7 +51,7 @@ struct AspeedI2CBus {
uint8_t id;
qemu_irq irq;
uint32_t regs[ASPEED_I2C_OLD_NUM_REG];
uint32_t regs[ASPEED_I2C_NEW_NUM_REG];
};
struct AspeedI2CState {
@ -61,6 +62,7 @@ struct AspeedI2CState {
uint32_t intr_status;
uint32_t ctrl_global;
uint32_t new_clk_divider;
MemoryRegion pool_iomem;
uint8_t pool[ASPEED_I2C_MAX_POOL_SIZE];