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target-alpha: Move exception helpers to helper.c.
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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0be034bc2c
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@ -434,6 +434,9 @@ int cpu_alpha_handle_mmu_fault (CPUAlphaState *env, uint64_t address, int rw,
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int mmu_idx);
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#define cpu_handle_mmu_fault cpu_alpha_handle_mmu_fault
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void do_interrupt (CPUAlphaState *env);
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void do_restore_state(CPUAlphaState *, void *retaddr);
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void QEMU_NORETURN dynamic_excp(CPUAlphaState *, void *, int, int);
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void QEMU_NORETURN arith_excp(CPUAlphaState *, void *, int, uint64_t);
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uint64_t cpu_alpha_load_fpcr (CPUAlphaState *env);
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void cpu_alpha_store_fpcr (CPUAlphaState *env, uint64_t val);
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@ -23,6 +23,7 @@
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#include "cpu.h"
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#include "softfloat.h"
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#include "helper.h"
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uint64_t cpu_alpha_load_fpcr (CPUAlphaState *env)
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{
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@ -484,3 +485,41 @@ void cpu_dump_state (CPUAlphaState *env, FILE *f, fprintf_function cpu_fprintf,
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}
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cpu_fprintf(f, "\n");
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}
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void do_restore_state(CPUAlphaState *env, void *retaddr)
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{
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uintptr_t pc = (uintptr_t)retaddr;
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if (pc) {
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TranslationBlock *tb = tb_find_pc(pc);
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if (tb) {
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cpu_restore_state(tb, env, pc);
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}
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}
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}
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/* This should only be called from translate, via gen_excp.
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We expect that ENV->PC has already been updated. */
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void QEMU_NORETURN helper_excp(CPUAlphaState *env, int excp, int error)
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{
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env->exception_index = excp;
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env->error_code = error;
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cpu_loop_exit(env);
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}
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/* This may be called from any of the helpers to set up EXCEPTION_INDEX. */
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void QEMU_NORETURN dynamic_excp(CPUAlphaState *env, void *retaddr,
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int excp, int error)
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{
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env->exception_index = excp;
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env->error_code = error;
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do_restore_state(env, retaddr);
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cpu_loop_exit(env);
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}
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void QEMU_NORETURN arith_excp(CPUAlphaState *env, void *retaddr,
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int exc, uint64_t mask)
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{
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env->trap_arg0 = exc;
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env->trap_arg1 = mask;
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dynamic_excp(env, retaddr, EXCP_ARITH, 0);
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}
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@ -1,6 +1,6 @@
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#include "def-helper.h"
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DEF_HELPER_2(excp, void, int, int)
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DEF_HELPER_3(excp, void, env, int, int)
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DEF_HELPER_FLAGS_0(load_pcc, TCG_CALL_CONST | TCG_CALL_PURE, i64)
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DEF_HELPER_2(addqv, i64, i64, i64)
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@ -30,43 +30,6 @@
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/*****************************************************************************/
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/* Exceptions processing helpers */
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/* This should only be called from translate, via gen_excp.
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We expect that ENV->PC has already been updated. */
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void QEMU_NORETURN helper_excp(int excp, int error)
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{
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env->exception_index = excp;
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env->error_code = error;
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cpu_loop_exit(env);
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}
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static void do_restore_state(void *retaddr)
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{
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unsigned long pc = (unsigned long)retaddr;
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if (pc) {
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TranslationBlock *tb = tb_find_pc(pc);
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if (tb) {
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cpu_restore_state(tb, env, pc);
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}
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}
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}
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/* This may be called from any of the helpers to set up EXCEPTION_INDEX. */
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static void QEMU_NORETURN dynamic_excp(int excp, int error)
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{
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env->exception_index = excp;
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env->error_code = error;
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do_restore_state(GETPC());
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cpu_loop_exit(env);
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}
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static void QEMU_NORETURN arith_excp(int exc, uint64_t mask)
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{
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env->trap_arg0 = exc;
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env->trap_arg1 = mask;
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dynamic_excp(EXCP_ARITH, 0);
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}
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uint64_t helper_load_pcc (void)
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{
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#ifndef CONFIG_USER_ONLY
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@ -97,7 +60,7 @@ uint64_t helper_addqv (uint64_t op1, uint64_t op2)
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uint64_t tmp = op1;
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op1 += op2;
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if (unlikely((tmp ^ op2 ^ (-1ULL)) & (tmp ^ op1) & (1ULL << 63))) {
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arith_excp(EXC_M_IOV, 0);
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arith_excp(env, GETPC(), EXC_M_IOV, 0);
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}
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return op1;
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}
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@ -107,7 +70,7 @@ uint64_t helper_addlv (uint64_t op1, uint64_t op2)
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uint64_t tmp = op1;
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op1 = (uint32_t)(op1 + op2);
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if (unlikely((tmp ^ op2 ^ (-1UL)) & (tmp ^ op1) & (1UL << 31))) {
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arith_excp(EXC_M_IOV, 0);
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arith_excp(env, GETPC(), EXC_M_IOV, 0);
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}
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return op1;
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}
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@ -117,7 +80,7 @@ uint64_t helper_subqv (uint64_t op1, uint64_t op2)
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uint64_t res;
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res = op1 - op2;
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if (unlikely((op1 ^ op2) & (res ^ op1) & (1ULL << 63))) {
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arith_excp(EXC_M_IOV, 0);
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arith_excp(env, GETPC(), EXC_M_IOV, 0);
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}
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return res;
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}
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@ -127,7 +90,7 @@ uint64_t helper_sublv (uint64_t op1, uint64_t op2)
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uint32_t res;
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res = op1 - op2;
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if (unlikely((op1 ^ op2) & (res ^ op1) & (1UL << 31))) {
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arith_excp(EXC_M_IOV, 0);
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arith_excp(env, GETPC(), EXC_M_IOV, 0);
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}
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return res;
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}
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@ -137,7 +100,7 @@ uint64_t helper_mullv (uint64_t op1, uint64_t op2)
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int64_t res = (int64_t)op1 * (int64_t)op2;
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if (unlikely((int32_t)res != res)) {
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arith_excp(EXC_M_IOV, 0);
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arith_excp(env, GETPC(), EXC_M_IOV, 0);
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}
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return (int64_t)((int32_t)res);
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}
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@ -149,7 +112,7 @@ uint64_t helper_mulqv (uint64_t op1, uint64_t op2)
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muls64(&tl, &th, op1, op2);
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/* If th != 0 && th != -1, then we had an overflow */
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if (unlikely((th + 1) > 1)) {
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arith_excp(EXC_M_IOV, 0);
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arith_excp(env, GETPC(), EXC_M_IOV, 0);
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}
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return tl;
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}
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@ -200,7 +163,7 @@ void helper_fp_exc_raise(uint32_t exc, uint32_t regno)
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hw_exc |= EXC_M_INE;
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}
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arith_excp(hw_exc, 1ull << regno);
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arith_excp(env, GETPC(), hw_exc, 1ull << regno);
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}
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}
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@ -230,7 +193,7 @@ uint64_t helper_ieee_input(uint64_t val)
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if (env->fpcr_dnz) {
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val &= 1ull << 63;
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} else {
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arith_excp(EXC_M_UNF, 0);
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arith_excp(env, GETPC(), EXC_M_UNF, 0);
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}
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}
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} else if (exp == 0x7ff) {
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@ -238,7 +201,7 @@ uint64_t helper_ieee_input(uint64_t val)
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/* ??? I'm not sure these exception bit flags are correct. I do
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know that the Linux kernel, at least, doesn't rely on them and
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just emulates the insn to figure out what exception to use. */
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arith_excp(frac ? EXC_M_INV : EXC_M_FOV, 0);
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arith_excp(env, GETPC(), frac ? EXC_M_INV : EXC_M_FOV, 0);
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}
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return val;
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}
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@ -255,12 +218,12 @@ uint64_t helper_ieee_input_cmp(uint64_t val)
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if (env->fpcr_dnz) {
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val &= 1ull << 63;
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} else {
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arith_excp(EXC_M_UNF, 0);
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arith_excp(env, GETPC(), EXC_M_UNF, 0);
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}
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}
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} else if (exp == 0x7ff && frac) {
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/* NaN. */
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arith_excp(EXC_M_INV, 0);
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arith_excp(env, GETPC(), EXC_M_INV, 0);
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}
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return val;
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}
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@ -323,7 +286,7 @@ static inline float32 f_to_float32(uint64_t a)
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if (unlikely(!exp && mant_sig)) {
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/* Reserved operands / Dirty zero */
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dynamic_excp(EXCP_OPCDEC, 0);
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dynamic_excp(env, GETPC(), EXCP_OPCDEC, 0);
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}
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if (exp < 3) {
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@ -453,7 +416,7 @@ static inline float64 g_to_float64(uint64_t a)
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if (!exp && mant_sig) {
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/* Reserved operands / Dirty zero */
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dynamic_excp(EXCP_OPCDEC, 0);
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dynamic_excp(env, GETPC(), EXCP_OPCDEC, 0);
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}
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if (exp < 3) {
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@ -1085,7 +1048,7 @@ static void QEMU_NORETURN do_unaligned_access(target_ulong addr, int is_write,
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uint64_t pc;
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uint32_t insn;
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do_restore_state(retaddr);
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do_restore_state(env, retaddr);
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pc = env->pc;
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insn = ldl_code(pc);
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@ -1093,7 +1056,9 @@ static void QEMU_NORETURN do_unaligned_access(target_ulong addr, int is_write,
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env->trap_arg0 = addr;
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env->trap_arg1 = insn >> 26; /* opcode */
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env->trap_arg2 = (insn >> 21) & 31; /* dest regno */
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helper_excp(EXCP_UNALIGN, 0);
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env->exception_index = EXCP_UNALIGN;
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env->error_code = 0;
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cpu_loop_exit(env);
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}
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void QEMU_NORETURN cpu_unassigned_access(CPUAlphaState *env1,
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@ -1103,7 +1068,7 @@ void QEMU_NORETURN cpu_unassigned_access(CPUAlphaState *env1,
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env = env1;
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env->trap_arg0 = addr;
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env->trap_arg1 = is_write;
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dynamic_excp(EXCP_MCHK, 0);
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dynamic_excp(env1, GETPC(), EXCP_MCHK, 0);
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}
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#include "softmmu_exec.h"
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@ -1137,7 +1102,7 @@ void tlb_fill(CPUAlphaState *env1, target_ulong addr, int is_write, int mmu_idx,
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env = env1;
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ret = cpu_alpha_handle_mmu_fault(env, addr, is_write, mmu_idx);
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if (unlikely(ret != 0)) {
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do_restore_state(retaddr);
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do_restore_state(env, retaddr);
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/* Exception index and error code are already set */
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cpu_loop_exit(env);
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}
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@ -149,7 +149,7 @@ static void gen_excp_1(int exception, int error_code)
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tmp1 = tcg_const_i32(exception);
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tmp2 = tcg_const_i32(error_code);
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gen_helper_excp(tmp1, tmp2);
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gen_helper_excp(cpu_env, tmp1, tmp2);
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tcg_temp_free_i32(tmp2);
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tcg_temp_free_i32(tmp1);
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}
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