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target/mips/mxu: Add Q8MADL instruction
The instruction is used to parallel multiply and accumulate four 8-bit data. Signed-off-by: Siarhei Volkau <lis8215@gmail.com> Message-Id: <20230608104222.1520143-32-lis8215@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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@ -406,6 +406,7 @@ enum {
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OPC_MXU__POOL20 = 0x39,
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OPC_MXU__POOL21 = 0x3A,
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OPC_MXU_Q16SCOP = 0x3B,
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OPC_MXU_Q8MADL = 0x3C,
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};
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@ -1423,6 +1424,77 @@ static void gen_mxu_q8mul_mac(DisasContext *ctx, bool su, bool mac)
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gen_store_mxu_gpr(t1, XRa);
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}
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/*
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* Q8MADL XRd, XRa, XRb, XRc
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* Parallel quad unsigned 8 bit multiply and accumulate.
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* e.g. XRd[0..3] = XRa[0..3] + XRb[0..3] * XRc[0..3]
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*/
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static void gen_mxu_q8madl(DisasContext *ctx)
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{
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TCGv t0, t1, t2, t3, t4, t5, t6, t7;
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uint32_t XRa, XRb, XRc, XRd, aptn2;
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t0 = tcg_temp_new();
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t1 = tcg_temp_new();
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t2 = tcg_temp_new();
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t3 = tcg_temp_new();
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t4 = tcg_temp_new();
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t5 = tcg_temp_new();
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t6 = tcg_temp_new();
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t7 = tcg_temp_new();
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XRa = extract32(ctx->opcode, 6, 4);
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XRb = extract32(ctx->opcode, 10, 4);
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XRc = extract32(ctx->opcode, 14, 4);
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XRd = extract32(ctx->opcode, 18, 4);
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aptn2 = extract32(ctx->opcode, 24, 2);
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gen_load_mxu_gpr(t3, XRb);
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gen_load_mxu_gpr(t7, XRc);
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tcg_gen_extract_tl(t0, t3, 0, 8);
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tcg_gen_extract_tl(t1, t3, 8, 8);
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tcg_gen_extract_tl(t2, t3, 16, 8);
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tcg_gen_extract_tl(t3, t3, 24, 8);
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tcg_gen_extract_tl(t4, t7, 0, 8);
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tcg_gen_extract_tl(t5, t7, 8, 8);
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tcg_gen_extract_tl(t6, t7, 16, 8);
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tcg_gen_extract_tl(t7, t7, 24, 8);
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tcg_gen_mul_tl(t0, t0, t4);
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tcg_gen_mul_tl(t1, t1, t5);
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tcg_gen_mul_tl(t2, t2, t6);
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tcg_gen_mul_tl(t3, t3, t7);
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gen_load_mxu_gpr(t4, XRa);
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tcg_gen_extract_tl(t6, t4, 0, 8);
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tcg_gen_extract_tl(t7, t4, 8, 8);
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if (aptn2 & 1) {
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tcg_gen_sub_tl(t0, t6, t0);
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tcg_gen_sub_tl(t1, t7, t1);
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} else {
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tcg_gen_add_tl(t0, t6, t0);
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tcg_gen_add_tl(t1, t7, t1);
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}
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tcg_gen_extract_tl(t6, t4, 16, 8);
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tcg_gen_extract_tl(t7, t4, 24, 8);
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if (aptn2 & 2) {
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tcg_gen_sub_tl(t2, t6, t2);
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tcg_gen_sub_tl(t3, t7, t3);
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} else {
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tcg_gen_add_tl(t2, t6, t2);
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tcg_gen_add_tl(t3, t7, t3);
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}
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tcg_gen_andi_tl(t5, t0, 0xff);
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tcg_gen_deposit_tl(t5, t5, t1, 8, 8);
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tcg_gen_deposit_tl(t5, t5, t2, 16, 8);
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tcg_gen_deposit_tl(t5, t5, t3, 24, 8);
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gen_store_mxu_gpr(t5, XRd);
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}
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/*
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* S32LDD XRa, Rb, S12 - Load a word from memory to XRF
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* S32LDDR XRa, Rb, S12 - Load a word from memory to XRF
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@ -4884,6 +4956,9 @@ bool decode_ase_mxu(DisasContext *ctx, uint32_t insn)
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case OPC_MXU_Q16SCOP:
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gen_mxu_q16scop(ctx);
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break;
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case OPC_MXU_Q8MADL:
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gen_mxu_q8madl(ctx);
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break;
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default:
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return false;
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}
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