mirrors/qemu
0
0
Fork 0
mirror of https://github.com/qemu/qemu.git synced 2024-11-29 14:53:35 +08:00
Code Issues Packages Projects Releases Wiki Activity

Merge remote-tracking branch 'qemu-kvm/uq/master' into staging

Browse Source 
# By Jan Kiszka (4) and Marcelo Tosatti (1)
# Via Marcelo Tosatti
* qemu-kvm/uq/master:
  vmxcap: Update according to SDM of January 2013
  target-i386: kvm: save/restore steal time MSR
  vmxcap: Report APIC register emulation and RDTSCP control
  vmxcap: Augment reported information
  vmxcap: Open MSR file in unbuffered mode

Message-id: cover.1366253306.git.mtosatti@redhat.com
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
This commit is contained in:
Anthony Liguori 2013-04-19 08:37:58 -05:00
commit b6c99f8a6d
4 changed files with 58 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

26
scripts/kvm/vmxcap
View File

@ -27,9 +27,9 @@ MSR_IA32_VMX_VMFUNC = 0x491
class msr(object):
def __init__(self):
try:
self.f = file('/dev/cpu/0/msr')
self.f = open('/dev/cpu/0/msr', 'r', 0)
except:
self.f = file('/dev/msr0')
self.f = open('/dev/msr0', 'r', 0)
def read(self, index, default = None):
import struct
self.f.seek(index)
@ -96,6 +96,19 @@ class Misc(object):
print ' %-40s %s' % (self.bits[bits], fmt(v))
controls = [
Misc(
name = 'Basic VMX Information',
bits = {
(0, 31): 'Revision',
(32,44): 'VMCS size',
48: 'VMCS restricted to 32 bit addresses',
49: 'Dual-monitor support',
(50, 53): 'VMCS memory type',
54: 'INS/OUTS instruction information',
55: 'IA32_VMX_TRUE_*_CTLS support',
},
msr = MSR_IA32_VMX_BASIC,
),
Control(
name = 'pin-based controls',
bits = {
@ -103,6 +116,7 @@ controls = [
3: 'NMI exiting',
5: 'Virtual NMIs',
6: 'Activate VMX-preemption timer',
7: 'Process posted interrupts',
},
cap_msr = MSR_IA32_VMX_PINBASED_CTLS,
true_cap_msr = MSR_IA32_VMX_TRUE_PINBASED_CTLS,
@ -143,15 +157,19 @@ controls = [
0: 'Virtualize APIC accesses',
1: 'Enable EPT',
2: 'Descriptor-table exiting',
3: 'Enable RDTSCP',
4: 'Virtualize x2APIC mode',
5: 'Enable VPID',
6: 'WBINVD exiting',
7: 'Unrestricted guest',
8: 'APIC register emulation',
9: 'Virtual interrupt delivery',
10: 'PAUSE-loop exiting',
11: 'RDRAND exiting',
12: 'Enable INVPCID',
13: 'Enable VM functions',
14: 'VMCS shadowing',
18: 'EPT-violation #VE'
},
cap_msr = MSR_IA32_VMX_PROCBASED_CTLS2,
),
@ -196,10 +214,12 @@ controls = [
6: 'HLT activity state',
7: 'Shutdown activity state',
8: 'Wait-for-SIPI activity state',
15: 'IA32_SMBASE support',
(16,24): 'Number of CR3-target values',
(25,27): 'MSR-load/store count recommenation',
28: 'IA32_SMM_MONITOR_CTL[2] can be set to 1',
(32,62): 'MSEG revision identifier',
29: 'VMWRITE to VM-exit information fields',
(32,63): 'MSEG revision identifier',
},
msr = MSR_IA32_VMX_MISC_CTLS,
),

1
target-i386/cpu.h
View File

@ -803,6 +803,7 @@ typedef struct CPUX86State {
#endif
uint64_t system_time_msr;
uint64_t wall_clock_msr;
uint64_t steal_time_msr;
uint64_t async_pf_en_msr;
uint64_t pv_eoi_en_msr;

13
target-i386/kvm.c
View File

@ -68,6 +68,7 @@ static bool has_msr_tsc_deadline;
static bool has_msr_async_pf_en;
static bool has_msr_pv_eoi_en;
static bool has_msr_misc_enable;
static bool has_msr_kvm_steal_time;
static int lm_capable_kernel;
bool kvm_allows_irq0_override(void)
@ -507,6 +508,8 @@ int kvm_arch_init_vcpu(CPUState *cs)
has_msr_pv_eoi_en = c->eax & (1 << KVM_FEATURE_PV_EOI);
has_msr_kvm_steal_time = c->eax & (1 << KVM_FEATURE_STEAL_TIME);
cpu_x86_cpuid(env, 0, 0, &limit, &unused, &unused, &unused);
for (i = 0; i <= limit; i++) {
@ -1107,6 +1110,10 @@ static int kvm_put_msrs(X86CPU *cpu, int level)
kvm_msr_entry_set(&msrs[n++], MSR_KVM_PV_EOI_EN,
env->pv_eoi_en_msr);
}
if (has_msr_kvm_steal_time) {
kvm_msr_entry_set(&msrs[n++], MSR_KVM_STEAL_TIME,
env->steal_time_msr);
}
if (hyperv_hypercall_available()) {
kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_GUEST_OS_ID, 0);
kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_HYPERCALL, 0);
@ -1360,6 +1367,9 @@ static int kvm_get_msrs(X86CPU *cpu)
if (has_msr_pv_eoi_en) {
msrs[n++].index = MSR_KVM_PV_EOI_EN;
}
if (has_msr_kvm_steal_time) {
msrs[n++].index = MSR_KVM_STEAL_TIME;
}
if (env->mcg_cap) {
msrs[n++].index = MSR_MCG_STATUS;
@ -1445,6 +1455,9 @@ static int kvm_get_msrs(X86CPU *cpu)
case MSR_KVM_PV_EOI_EN:
env->pv_eoi_en_msr = msrs[i].data;
break;
case MSR_KVM_STEAL_TIME:
env->steal_time_msr = msrs[i].data;
break;
}
}

21
target-i386/machine.c
View File

@ -292,6 +292,24 @@ static bool pv_eoi_msr_needed(void *opaque)
return cpu->env.pv_eoi_en_msr != 0;
}
static bool steal_time_msr_needed(void *opaque)
{
CPUX86State *cpu = opaque;
return cpu->steal_time_msr != 0;
}
static const VMStateDescription vmstate_steal_time_msr = {
.name = "cpu/steal_time_msr",
.version_id = 1,
.minimum_version_id = 1,
.minimum_version_id_old = 1,
.fields = (VMStateField []) {
VMSTATE_UINT64(steal_time_msr, CPUX86State),
VMSTATE_END_OF_LIST()
}
};
static const VMStateDescription vmstate_async_pf_msr = {
.name = "cpu/async_pf_msr",
.version_id = 1,
@ -502,6 +520,9 @@ const VMStateDescription vmstate_x86_cpu = {
} , {
.vmsd = &vmstate_pv_eoi_msr,
.needed = pv_eoi_msr_needed,
} , {
.vmsd = &vmstate_steal_time_msr,
.needed = steal_time_msr_needed,
} , {
.vmsd = &vmstate_fpop_ip_dp,
.needed = fpop_ip_dp_needed,