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target-arm queue:

Browse Source 
* fix a TCG temporary leak in aarch64 rev16
  * fsl_imx*: migrate the ROM contents
  * integratorcp: don't use vmstate_register_ram_global for flash
  * mps2: Correctly set parent bus for SCC device
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Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20170724' into staging

target-arm queue:
 * fix a TCG temporary leak in aarch64 rev16
 * fsl_imx*: migrate the ROM contents
 * integratorcp: don't use vmstate_register_ram_global for flash
 * mps2: Correctly set parent bus for SCC device

# gpg: Signature made Mon 24 Jul 2017 18:05:06 BST
# gpg:                using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20170724:
  integratorcp: Don't migrate flash using vmstate_register_ram_global()
  mps2: Correctly set parent bus for SCC device
  fsl_imx*: Migrate ROM contents
  target/arm: fix TCG temp leak in aarch64 rev16

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2017-07-24 18:15:45 +01:00
commit b5a74cd81d
6 changed files with 9 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
hw/arm/fsl-imx25.c
View File

@ -249,7 +249,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
} }
/* initialize 2 x 16 KB ROM */ /* initialize 2 x 16 KB ROM */
memory_region_init_rom_nomigrate(&s->rom[0], NULL, memory_region_init_rom(&s->rom[0], NULL,
"imx25.rom0", FSL_IMX25_ROM0_SIZE, &err); "imx25.rom0", FSL_IMX25_ROM0_SIZE, &err);
if (err) { if (err) {
error_propagate(errp, err); error_propagate(errp, err);
@ -257,7 +257,7 @@ static void fsl_imx25_realize(DeviceState *dev, Error **errp)
} }
memory_region_add_subregion(get_system_memory(), FSL_IMX25_ROM0_ADDR, memory_region_add_subregion(get_system_memory(), FSL_IMX25_ROM0_ADDR,
&s->rom[0]); &s->rom[0]);
memory_region_init_rom_nomigrate(&s->rom[1], NULL, memory_region_init_rom(&s->rom[1], NULL,
"imx25.rom1", FSL_IMX25_ROM1_SIZE, &err); "imx25.rom1", FSL_IMX25_ROM1_SIZE, &err);
if (err) { if (err) {
error_propagate(errp, err); error_propagate(errp, err);

4
hw/arm/fsl-imx31.c
View File

@ -219,7 +219,7 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp)
} }
/* On a real system, the first 16k is a `secure boot rom' */ /* On a real system, the first 16k is a `secure boot rom' */
memory_region_init_rom_nomigrate(&s->secure_rom, NULL, "imx31.secure_rom", memory_region_init_rom(&s->secure_rom, NULL, "imx31.secure_rom",
FSL_IMX31_SECURE_ROM_SIZE, &err); FSL_IMX31_SECURE_ROM_SIZE, &err);
if (err) { if (err) {
error_propagate(errp, err); error_propagate(errp, err);
@ -229,7 +229,7 @@ static void fsl_imx31_realize(DeviceState *dev, Error **errp)
&s->secure_rom); &s->secure_rom);
/* There is also a 16k ROM */ /* There is also a 16k ROM */
memory_region_init_rom_nomigrate(&s->rom, NULL, "imx31.rom", memory_region_init_rom(&s->rom, NULL, "imx31.rom",
FSL_IMX31_ROM_SIZE, &err); FSL_IMX31_ROM_SIZE, &err);
if (err) { if (err) {
error_propagate(errp, err); error_propagate(errp, err);

4
hw/arm/fsl-imx6.c
View File

@ -399,7 +399,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
FSL_IMX6_ENET_MAC_1588_IRQ)); FSL_IMX6_ENET_MAC_1588_IRQ));
/* ROM memory */ /* ROM memory */
memory_region_init_rom_nomigrate(&s->rom, NULL, "imx6.rom", memory_region_init_rom(&s->rom, NULL, "imx6.rom",
FSL_IMX6_ROM_SIZE, &err); FSL_IMX6_ROM_SIZE, &err);
if (err) { if (err) {
error_propagate(errp, err); error_propagate(errp, err);
@ -409,7 +409,7 @@ static void fsl_imx6_realize(DeviceState *dev, Error **errp)
&s->rom); &s->rom);
/* CAAM memory */ /* CAAM memory */
memory_region_init_rom_nomigrate(&s->caam, NULL, "imx6.caam", memory_region_init_rom(&s->caam, NULL, "imx6.caam",
FSL_IMX6_CAAM_MEM_SIZE, &err); FSL_IMX6_CAAM_MEM_SIZE, &err);
if (err) { if (err) {
error_propagate(errp, err); error_propagate(errp, err);

3
hw/arm/integratorcp.c
View File

@ -276,9 +276,8 @@ static void integratorcm_init(Object *obj)
s->cm_init = 0x00000112; s->cm_init = 0x00000112;
s->cm_refcnt_offset = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 24, s->cm_refcnt_offset = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 24,
1000); 1000);
memory_region_init_ram_nomigrate(&s->flash, obj, "integrator.flash", 0x100000, memory_region_init_ram(&s->flash, obj, "integrator.flash", 0x100000,
&error_fatal); &error_fatal);
vmstate_register_ram_global(&s->flash);
memory_region_init_io(&s->iomem, obj, &integratorcm_ops, s, memory_region_init_io(&s->iomem, obj, &integratorcm_ops, s,
"integratorcm", 0x00800000); "integratorcm", 0x00800000);

2
hw/arm/mps2.c
View File

@ -303,7 +303,7 @@ static void mps2_common_init(MachineState *machine)
object_initialize(&mms->scc, sizeof(mms->scc), TYPE_MPS2_SCC); object_initialize(&mms->scc, sizeof(mms->scc), TYPE_MPS2_SCC);
sccdev = DEVICE(&mms->scc); sccdev = DEVICE(&mms->scc);
qdev_set_parent_bus(armv7m, sysbus_get_default()); qdev_set_parent_bus(sccdev, sysbus_get_default());
qdev_prop_set_uint32(sccdev, "scc-cfg4", 0x2); qdev_prop_set_uint32(sccdev, "scc-cfg4", 0x2);
qdev_prop_set_uint32(sccdev, "scc-aid", 0x02000008); qdev_prop_set_uint32(sccdev, "scc-aid", 0x02000008);
qdev_prop_set_uint32(sccdev, "scc-id", mmc->scc_id); qdev_prop_set_uint32(sccdev, "scc-id", mmc->scc_id);

1
target/arm/translate-a64.c
View File

@ -4051,6 +4051,7 @@ static void handle_rev16(DisasContext *s, unsigned int sf,
tcg_gen_shli_i64(tcg_rd, tcg_rd, 8); tcg_gen_shli_i64(tcg_rd, tcg_rd, 8);
tcg_gen_or_i64(tcg_rd, tcg_rd, tcg_tmp); tcg_gen_or_i64(tcg_rd, tcg_rd, tcg_tmp);
tcg_temp_free_i64(mask);
tcg_temp_free_i64(tcg_tmp); tcg_temp_free_i64(tcg_tmp);
} }