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target/arm: Use FIELD_EX32 for testing 32-bit fields

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Cut-and-paste errors mean we're using FIELD_EX64() to extract fields from
some 32-bit ID register fields. Use FIELD_EX32() instead. (This makes
no difference in behaviour, it's just more consistent.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200214175116.9164-21-peter.maydell@linaro.org
This commit is contained in:
Peter Maydell 2020-02-14 17:51:15 +00:00
parent 4036b7d1cd
commit b3a816f6ce
1 changed files with 9 additions and 9 deletions
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18
target/arm/cpu.h
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@ -3453,18 +3453,18 @@ static inline bool isar_feature_aa32_fp16_arith(const ARMISARegisters *id)
static inline bool isar_feature_aa32_fp_d32(const ARMISARegisters *id) static inline bool isar_feature_aa32_fp_d32(const ARMISARegisters *id)
{ {
/* Return true if D16-D31 are implemented */ /* Return true if D16-D31 are implemented */
return FIELD_EX64(id->mvfr0, MVFR0, SIMDREG) >= 2; return FIELD_EX32(id->mvfr0, MVFR0, SIMDREG) >= 2;
} }
static inline bool isar_feature_aa32_fpshvec(const ARMISARegisters *id) static inline bool isar_feature_aa32_fpshvec(const ARMISARegisters *id)
{ {
return FIELD_EX64(id->mvfr0, MVFR0, FPSHVEC) > 0; return FIELD_EX32(id->mvfr0, MVFR0, FPSHVEC) > 0;
} }
static inline bool isar_feature_aa32_fpdp(const ARMISARegisters *id) static inline bool isar_feature_aa32_fpdp(const ARMISARegisters *id)
{ {
/* Return true if CPU supports double precision floating point */ /* Return true if CPU supports double precision floating point */
return FIELD_EX64(id->mvfr0, MVFR0, FPDP) > 0; return FIELD_EX32(id->mvfr0, MVFR0, FPDP) > 0;
} }
/* /*
@ -3474,32 +3474,32 @@ static inline bool isar_feature_aa32_fpdp(const ARMISARegisters *id)
*/ */
static inline bool isar_feature_aa32_fp16_spconv(const ARMISARegisters *id) static inline bool isar_feature_aa32_fp16_spconv(const ARMISARegisters *id)
{ {
return FIELD_EX64(id->mvfr1, MVFR1, FPHP) > 0; return FIELD_EX32(id->mvfr1, MVFR1, FPHP) > 0;
} }
static inline bool isar_feature_aa32_fp16_dpconv(const ARMISARegisters *id) static inline bool isar_feature_aa32_fp16_dpconv(const ARMISARegisters *id)
{ {
return FIELD_EX64(id->mvfr1, MVFR1, FPHP) > 1; return FIELD_EX32(id->mvfr1, MVFR1, FPHP) > 1;
} }
static inline bool isar_feature_aa32_vsel(const ARMISARegisters *id) static inline bool isar_feature_aa32_vsel(const ARMISARegisters *id)
{ {
return FIELD_EX64(id->mvfr2, MVFR2, FPMISC) >= 1; return FIELD_EX32(id->mvfr2, MVFR2, FPMISC) >= 1;
} }
static inline bool isar_feature_aa32_vcvt_dr(const ARMISARegisters *id) static inline bool isar_feature_aa32_vcvt_dr(const ARMISARegisters *id)
{ {
return FIELD_EX64(id->mvfr2, MVFR2, FPMISC) >= 2; return FIELD_EX32(id->mvfr2, MVFR2, FPMISC) >= 2;
} }
static inline bool isar_feature_aa32_vrint(const ARMISARegisters *id) static inline bool isar_feature_aa32_vrint(const ARMISARegisters *id)
{ {
return FIELD_EX64(id->mvfr2, MVFR2, FPMISC) >= 3; return FIELD_EX32(id->mvfr2, MVFR2, FPMISC) >= 3;
} }
static inline bool isar_feature_aa32_vminmaxnm(const ARMISARegisters *id) static inline bool isar_feature_aa32_vminmaxnm(const ARMISARegisters *id)
{ {
return FIELD_EX64(id->mvfr2, MVFR2, FPMISC) >= 4; return FIELD_EX32(id->mvfr2, MVFR2, FPMISC) >= 4;
} }
static inline bool isar_feature_aa32_pan(const ARMISARegisters *id) static inline bool isar_feature_aa32_pan(const ARMISARegisters *id)