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PowerPC target coding style fixes.

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3348 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
j_mayer 2007-10-07 17:30:34 +00:00
parent b068d6a713
commit b33c17e12d
6 changed files with 25 additions and 33 deletions
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11
hw/ppc.c
View File

@ -600,7 +600,7 @@ uint64_t cpu_ppc_load_purr (CPUState *env)
uint64_t diff; uint64_t diff;
diff = qemu_get_clock(vm_clock) - tb_env->purr_start; diff = qemu_get_clock(vm_clock) - tb_env->purr_start;
return tb_env->purr_load + muldiv64(diff, tb_env->tb_freq, ticks_per_sec); return tb_env->purr_load + muldiv64(diff, tb_env->tb_freq, ticks_per_sec);
} }
#endif /* defined(TARGET_PPC64H) */ #endif /* defined(TARGET_PPC64H) */
@ -631,10 +631,10 @@ static always_inline void cpu_ppc_hdecr_excp (CPUState *env)
} }
static void __cpu_ppc_store_decr (CPUState *env, uint64_t *nextp, static void __cpu_ppc_store_decr (CPUState *env, uint64_t *nextp,
struct QEMUTimer *timer, struct QEMUTimer *timer,
void (*raise_excp)(CPUState *), void (*raise_excp)(CPUState *),
uint32_t decr, uint32_t value, uint32_t decr, uint32_t value,
int is_excp) int is_excp)
{ {
ppc_tb_t *tb_env = env->tb_env; ppc_tb_t *tb_env = env->tb_env;
uint64_t now, next; uint64_t now, next;
@ -1151,7 +1151,6 @@ int ppc_dcr_init (CPUState *env, int (*read_error)(int dcrn),
return 0; return 0;
} }
#if 0 #if 0
/*****************************************************************************/ /*****************************************************************************/
/* Handle system reset (for now, just stop emulation) */ /* Handle system reset (for now, just stop emulation) */

1
target-ppc/cpu.h
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@ -225,7 +225,6 @@ enum {
POWERPC_EXCP_SYSCALL_USER = 0x203, /* System call in user mode only */ POWERPC_EXCP_SYSCALL_USER = 0x203, /* System call in user mode only */
}; };
/* Exceptions error codes */ /* Exceptions error codes */
enum { enum {
/* Exception subtypes for POWERPC_EXCP_ALIGN */ /* Exception subtypes for POWERPC_EXCP_ALIGN */

40
target-ppc/helper.c
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@ -626,8 +626,8 @@ static int slb_lookup (CPUPPCState *env, target_ulong eaddr,
tmp = ldl_phys(sr_base + 8); tmp = ldl_phys(sr_base + 8);
#if defined(DEBUG_SLB) #if defined(DEBUG_SLB)
if (loglevel != 0) { if (loglevel != 0) {
fprintf(logfile, "%s: seg %d " PADDRX " %016" PRIx64 " %08" PRIx32 "\n", fprintf(logfile, "%s: seg %d " PADDRX " %016" PRIx64 " %08"
__func__, n, sr_base, tmp64, tmp); PRIx32 "\n", __func__, n, sr_base, tmp64, tmp);
} }
#endif #endif
if (tmp64 & 0x0000000008000000ULL) { if (tmp64 & 0x0000000008000000ULL) {
@ -869,25 +869,25 @@ static int get_segment (CPUState *env, mmu_ctx_t *ctx,
} }
} }
#if defined (DEBUG_MMU) #if defined (DEBUG_MMU)
if (loglevel != 0) { if (loglevel != 0) {
target_phys_addr_t curaddr; target_phys_addr_t curaddr;
uint32_t a0, a1, a2, a3; uint32_t a0, a1, a2, a3;
fprintf(logfile,
"Page table: " PADDRX " len " PADDRX "\n",
sdr, mask + 0x80);
for (curaddr = sdr; curaddr < (sdr + mask + 0x80);
curaddr += 16) {
a0 = ldl_phys(curaddr);
a1 = ldl_phys(curaddr + 4);
a2 = ldl_phys(curaddr + 8);
a3 = ldl_phys(curaddr + 12);
if (a0 != 0 || a1 != 0 || a2 != 0 || a3 != 0) {
fprintf(logfile, fprintf(logfile,
"Page table: " PADDRX " len " PADDRX "\n", PADDRX ": %08x %08x %08x %08x\n",
sdr, mask + 0x80); curaddr, a0, a1, a2, a3);
for (curaddr = sdr; curaddr < (sdr + mask + 0x80);
curaddr += 16) {
a0 = ldl_phys(curaddr);
a1 = ldl_phys(curaddr + 4);
a2 = ldl_phys(curaddr + 8);
a3 = ldl_phys(curaddr + 12);
if (a0 != 0 || a1 != 0 || a2 != 0 || a3 != 0) {
fprintf(logfile,
PADDRX ": %08x %08x %08x %08x\n",
curaddr, a0, a1, a2, a3);
}
}
} }
}
}
#endif #endif
} else { } else {
#if defined (DEBUG_MMU) #if defined (DEBUG_MMU)
@ -1714,7 +1714,6 @@ void do_store_dbatl (CPUPPCState *env, int nr, target_ulong value)
env->DBAT[1][nr] = value; env->DBAT[1][nr] = value;
} }
/*****************************************************************************/ /*****************************************************************************/
/* TLB management */ /* TLB management */
void ppc_tlb_invalidate_all (CPUPPCState *env) void ppc_tlb_invalidate_all (CPUPPCState *env)
@ -1843,7 +1842,6 @@ void ppc_slb_invalidate_one (CPUPPCState *env, uint64_t T0)
} }
#endif #endif
/*****************************************************************************/ /*****************************************************************************/
/* Special registers manipulation */ /* Special registers manipulation */
#if defined(TARGET_PPC64) #if defined(TARGET_PPC64)

2
target-ppc/op.c
View File

@ -120,7 +120,6 @@
#define REG 31 #define REG 31
#include "op_template.h" #include "op_template.h"
void OPPROTO op_print_mem_EA (void) void OPPROTO op_print_mem_EA (void)
{ {
do_print_mem_EA(T0); do_print_mem_EA(T0);
@ -1426,7 +1425,6 @@ void OPPROTO op_andi_T1_64 (void)
} }
#endif #endif
/* count leading zero */ /* count leading zero */
void OPPROTO op_cntlzw (void) void OPPROTO op_cntlzw (void)
{ {

2
target-ppc/op_mem.h
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@ -482,7 +482,6 @@ static always_inline void glue(stfiwxr, MEMSUFFIX) (target_ulong EA, double d)
glue(stl, MEMSUFFIX)(EA, u.u); glue(stl, MEMSUFFIX)(EA, u.u);
} }
PPC_STF_OP(fd_le, stfqr); PPC_STF_OP(fd_le, stfqr);
PPC_STF_OP(fs_le, stfsr); PPC_STF_OP(fs_le, stfsr);
PPC_STF_OP(fiwx_le, stfiwxr); PPC_STF_OP(fiwx_le, stfiwxr);
@ -1079,7 +1078,6 @@ _PPC_SPE_LD_OP_64(name, op)
_PPC_SPE_LD_OP(name, op) _PPC_SPE_LD_OP(name, op)
#endif #endif
#define _PPC_SPE_ST_OP(name, op) \ #define _PPC_SPE_ST_OP(name, op) \
void OPPROTO glue(glue(op_spe_st, name), MEMSUFFIX) (void) \ void OPPROTO glue(glue(op_spe_st, name), MEMSUFFIX) (void) \
{ \ { \

2
target-ppc/translate.c
View File

@ -6566,7 +6566,7 @@ static always_inline int gen_intermediate_code_internal (CPUState *env,
branch_step = 1; branch_step = 1;
else else
branch_step = 0; branch_step = 0;
ctx.singlestep_enabled = env->singlestep_enabled || single_step == 1;; ctx.singlestep_enabled = env->singlestep_enabled || single_step == 1;
#if defined (DO_SINGLE_STEP) && 0 #if defined (DO_SINGLE_STEP) && 0
/* Single step trace mode */ /* Single step trace mode */
msr_se = 1; msr_se = 1;