mirrors/qemu
0
0
Fork 0
mirror of https://github.com/qemu/qemu.git synced 2024-12-05 01:33:41 +08:00
Code Issues Packages Projects Releases Wiki Activity

target/mips: msa: Split helpers for HSUB_<S|U>.<H|W|D>

Browse Source 
Achieves clearer code and slightly better performance.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@rt-rk.com>
Message-Id: <1571826227-10583-12-git-send-email-aleksandar.markovic@rt-rk.com>
This commit is contained in:
Aleksandar Markovic 2019-10-23 12:23:44 +02:00
parent 8a0ee3802f
commit b24b9aec96
3 changed files with 129 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
target/mips/helper.h
View File

@ -945,6 +945,14 @@ DEF_HELPER_4(msa_mod_s_h, void, env, i32, i32, i32)
DEF_HELPER_4(msa_mod_s_w, void, env, i32, i32, i32)
DEF_HELPER_4(msa_mod_s_d, void, env, i32, i32, i32)
DEF_HELPER_4(msa_hsub_s_h, void, env, i32, i32, i32)
DEF_HELPER_4(msa_hsub_s_w, void, env, i32, i32, i32)
DEF_HELPER_4(msa_hsub_s_d, void, env, i32, i32, i32)
DEF_HELPER_4(msa_hsub_u_h, void, env, i32, i32, i32)
DEF_HELPER_4(msa_hsub_u_w, void, env, i32, i32, i32)
DEF_HELPER_4(msa_hsub_u_d, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ilvev_b, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ilvev_h, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ilvev_w, void, env, i32, i32, i32)
@ -1059,8 +1067,6 @@ DEF_HELPER_5(msa_dpsub_u_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_sld_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_splat_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_vshf_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_hsub_s_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_hsub_u_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_sldi_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_splati_df, void, env, i32, i32, i32, i32)

108
target/mips/msa_helper.c
View File

@ -2888,7 +2888,101 @@ void helper_msa_mod_u_d(CPUMIPSState *env,
* +---------------+----------------------------------------------------------+
*/
/* TODO: insert Int Subtract group helpers here */
/* TODO: insert the rest of Int Subtract group helpers here */
static inline int64_t msa_hsub_s_df(uint32_t df, int64_t arg1, int64_t arg2)
{
return SIGNED_ODD(arg1, df) - SIGNED_EVEN(arg2, df);
}
void helper_msa_hsub_s_h(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
pwd->h[0] = msa_hsub_s_df(DF_HALF, pws->h[0], pwt->h[0]);
pwd->h[1] = msa_hsub_s_df(DF_HALF, pws->h[1], pwt->h[1]);
pwd->h[2] = msa_hsub_s_df(DF_HALF, pws->h[2], pwt->h[2]);
pwd->h[3] = msa_hsub_s_df(DF_HALF, pws->h[3], pwt->h[3]);
pwd->h[4] = msa_hsub_s_df(DF_HALF, pws->h[4], pwt->h[4]);
pwd->h[5] = msa_hsub_s_df(DF_HALF, pws->h[5], pwt->h[5]);
pwd->h[6] = msa_hsub_s_df(DF_HALF, pws->h[6], pwt->h[6]);
pwd->h[7] = msa_hsub_s_df(DF_HALF, pws->h[7], pwt->h[7]);
}
void helper_msa_hsub_s_w(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
pwd->w[0] = msa_hsub_s_df(DF_WORD, pws->w[0], pwt->w[0]);
pwd->w[1] = msa_hsub_s_df(DF_WORD, pws->w[1], pwt->w[1]);
pwd->w[2] = msa_hsub_s_df(DF_WORD, pws->w[2], pwt->w[2]);
pwd->w[3] = msa_hsub_s_df(DF_WORD, pws->w[3], pwt->w[3]);
}
void helper_msa_hsub_s_d(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
pwd->d[0] = msa_hsub_s_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
pwd->d[1] = msa_hsub_s_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
}
static inline int64_t msa_hsub_u_df(uint32_t df, int64_t arg1, int64_t arg2)
{
return UNSIGNED_ODD(arg1, df) - UNSIGNED_EVEN(arg2, df);
}
void helper_msa_hsub_u_h(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
pwd->h[0] = msa_hsub_u_df(DF_HALF, pws->h[0], pwt->h[0]);
pwd->h[1] = msa_hsub_u_df(DF_HALF, pws->h[1], pwt->h[1]);
pwd->h[2] = msa_hsub_u_df(DF_HALF, pws->h[2], pwt->h[2]);
pwd->h[3] = msa_hsub_u_df(DF_HALF, pws->h[3], pwt->h[3]);
pwd->h[4] = msa_hsub_u_df(DF_HALF, pws->h[4], pwt->h[4]);
pwd->h[5] = msa_hsub_u_df(DF_HALF, pws->h[5], pwt->h[5]);
pwd->h[6] = msa_hsub_u_df(DF_HALF, pws->h[6], pwt->h[6]);
pwd->h[7] = msa_hsub_u_df(DF_HALF, pws->h[7], pwt->h[7]);
}
void helper_msa_hsub_u_w(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
pwd->w[0] = msa_hsub_u_df(DF_WORD, pws->w[0], pwt->w[0]);
pwd->w[1] = msa_hsub_u_df(DF_WORD, pws->w[1], pwt->w[1]);
pwd->w[2] = msa_hsub_u_df(DF_WORD, pws->w[2], pwt->w[2]);
pwd->w[3] = msa_hsub_u_df(DF_WORD, pws->w[3], pwt->w[3]);
}
void helper_msa_hsub_u_d(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
pwd->d[0] = msa_hsub_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
pwd->d[1] = msa_hsub_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
}
/*
@ -4450,16 +4544,6 @@ static inline void msa_sld_df(uint32_t df, wr_t *pwd,
}
}
static inline int64_t msa_hsub_s_df(uint32_t df, int64_t arg1, int64_t arg2)
{
return SIGNED_ODD(arg1, df) - SIGNED_EVEN(arg2, df);
}
static inline int64_t msa_hsub_u_df(uint32_t df, int64_t arg1, int64_t arg2)
{
return UNSIGNED_ODD(arg1, df) - UNSIGNED_EVEN(arg2, df);
}
static inline int64_t msa_mul_q_df(uint32_t df, int64_t arg1, int64_t arg2)
{
int64_t q_min = DF_MIN_INT(df);
@ -4545,8 +4629,6 @@ MSA_BINOP_DF(asub_u)
MSA_BINOP_DF(mulv)
MSA_BINOP_DF(dotp_s)
MSA_BINOP_DF(dotp_u)
MSA_BINOP_DF(hsub_s)
MSA_BINOP_DF(hsub_u)
MSA_BINOP_DF(mul_q)
MSA_BINOP_DF(mulr_q)

32
target/mips/translate.c
View File

@ -29107,6 +29107,32 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext *ctx)
break;
}
break;
case OPC_HSUB_S_df:
switch (df) {
case DF_HALF:
gen_helper_msa_hsub_s_h(cpu_env, twd, tws, twt);
break;
case DF_WORD:
gen_helper_msa_hsub_s_w(cpu_env, twd, tws, twt);
break;
case DF_DOUBLE:
gen_helper_msa_hsub_s_d(cpu_env, twd, tws, twt);
break;
}
break;
case OPC_HSUB_U_df:
switch (df) {
case DF_HALF:
gen_helper_msa_hsub_u_h(cpu_env, twd, tws, twt);
break;
case DF_WORD:
gen_helper_msa_hsub_u_w(cpu_env, twd, tws, twt);
break;
case DF_DOUBLE:
gen_helper_msa_hsub_u_d(cpu_env, twd, tws, twt);
break;
}
break;
case OPC_DOTP_S_df:
gen_helper_msa_dotp_s_df(cpu_env, tdf, twd, tws, twt);
break;
@ -29125,12 +29151,6 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext *ctx)
case OPC_DPSUB_U_df:
gen_helper_msa_dpsub_u_df(cpu_env, tdf, twd, tws, twt);
break;
case OPC_HSUB_S_df:
gen_helper_msa_hsub_s_df(cpu_env, tdf, twd, tws, twt);
break;
case OPC_HSUB_U_df:
gen_helper_msa_hsub_u_df(cpu_env, tdf, twd, tws, twt);
break;
}
break;
default: