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tcg/aarch64: Support TCG_TARGET_HAS_tst_vec

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Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2024-05-15 15:19:53 +02:00
parent 6975cc45c3
commit b04574d44f
2 changed files with 25 additions and 3 deletions
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26
tcg/aarch64/tcg-target.c.inc
View File

@ -2737,7 +2737,8 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
TCGCond cond = args[3];
AArch64Insn insn;
if (cond == TCG_COND_NE) {
switch (cond) {
case TCG_COND_NE:
if (const_args[2]) {
if (is_scalar) {
tcg_out_insn(s, 3611, CMTST, vece, a0, a1, a1);
@ -2752,7 +2753,27 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
}
tcg_out_insn(s, 3617, NOT, is_q, 0, a0, a0);
}
} else {
break;
case TCG_COND_TSTNE:
case TCG_COND_TSTEQ:
if (const_args[2]) {
/* (x & 0) == 0 */
tcg_out_dupi_vec(s, type, MO_8, a0,
-(cond == TCG_COND_TSTEQ));
break;
}
if (is_scalar) {
tcg_out_insn(s, 3611, CMTST, vece, a0, a1, a2);
} else {
tcg_out_insn(s, 3616, CMTST, is_q, vece, a0, a1, a2);
}
if (cond == TCG_COND_TSTEQ) {
tcg_out_insn(s, 3617, NOT, is_q, 0, a0, a0);
}
break;
default:
if (const_args[2]) {
if (is_scalar) {
insn = cmp0_scalar_insn[cond];
@ -2791,6 +2812,7 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
}
tcg_out_insn_3616(s, insn, is_q, vece, a0, a1, a2);
}
break;
}
}
break;

2
tcg/aarch64/tcg-target.h
View File

@ -167,7 +167,7 @@ typedef enum {
#define TCG_TARGET_HAS_minmax_vec 1
#define TCG_TARGET_HAS_bitsel_vec 1
#define TCG_TARGET_HAS_cmpsel_vec 0
#define TCG_TARGET_HAS_tst_vec 0
#define TCG_TARGET_HAS_tst_vec 1
#define TCG_TARGET_DEFAULT_MO (0)
#define TCG_TARGET_NEED_LDST_LABELS