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target-s390: Convert LOAD LOGICAL IMMEDIATE
Signed-off-by: Richard Henderson <rth@twiddle.net>
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@ -168,6 +168,13 @@
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/* LOAD LOGICAL HALFWORD RELATIVE LONG */
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C(0xc402, LLHRL, RIL_b, GIE, 0, ri2, new, r1_32, ld16u, 0)
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C(0xc406, LLGHRL, RIL_b, GIE, 0, ri2, r1, 0, ld16u, 0)
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/* LOAD LOGICAL IMMEDATE */
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D(0xc00e, LLIHF, RIL_a, EI, 0, i2_32u_shl, 0, r1, mov2, 0, 32)
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D(0xc00f, LLILF, RIL_a, EI, 0, i2_32u_shl, 0, r1, mov2, 0, 0)
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D(0xa50c, LLIHH, RI_a, Z, 0, i2_16u_shl, 0, r1, mov2, 0, 48)
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D(0xa50d, LLIHL, RI_a, Z, 0, i2_16u_shl, 0, r1, mov2, 0, 32)
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D(0xa50e, LLILH, RI_a, Z, 0, i2_16u_shl, 0, r1, mov2, 0, 16)
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D(0xa50f, LLILL, RI_a, Z, 0, i2_16u_shl, 0, r1, mov2, 0, 0)
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/* MULTIPLY */
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C(0x1c00, MR, RR_a, Z, r1p1_32s, r2_32s, new, r1_D32, mul, 0)
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@ -2033,26 +2033,6 @@ static void disas_a5(CPUS390XState *env, DisasContext *s, int op, int r1,
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tcg_temp_free_i32(tmp32);
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tcg_temp_free_i64(tmp);
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break;
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case 0xc: /* LLIHH R1,I2 [RI] */
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tmp = tcg_const_i64( ((uint64_t)i2) << 48 );
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store_reg(r1, tmp);
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tcg_temp_free_i64(tmp);
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break;
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case 0xd: /* LLIHL R1,I2 [RI] */
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tmp = tcg_const_i64( ((uint64_t)i2) << 32 );
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store_reg(r1, tmp);
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tcg_temp_free_i64(tmp);
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break;
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case 0xe: /* LLILH R1,I2 [RI] */
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tmp = tcg_const_i64( ((uint64_t)i2) << 16 );
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store_reg(r1, tmp);
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tcg_temp_free_i64(tmp);
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break;
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case 0xf: /* LLILL R1,I2 [RI] */
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tmp = tcg_const_i64(i2);
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store_reg(r1, tmp);
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tcg_temp_free_i64(tmp);
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break;
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default:
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LOG_DISAS("illegal a5 operation 0x%x\n", op);
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gen_illegal_opcode(s);
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@ -3043,16 +3023,6 @@ static void disas_c0(CPUS390XState *env, DisasContext *s, int op, int r1, int i2
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tcg_temp_free_i64(tmp);
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tcg_temp_free_i32(tmp32_1);
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break;
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case 0xe: /* LLIHF R1,I2 [RIL] */
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tmp = tcg_const_i64(((uint64_t)(uint32_t)i2) << 32);
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store_reg(r1, tmp);
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tcg_temp_free_i64(tmp);
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break;
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case 0xf: /* LLILF R1,I2 [RIL] */
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tmp = tcg_const_i64((uint32_t)i2);
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store_reg(r1, tmp);
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tcg_temp_free_i64(tmp);
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break;
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default:
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LOG_DISAS("illegal c0 operation 0x%x\n", op);
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gen_illegal_opcode(s);
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@ -4694,6 +4664,18 @@ static void in2_i2_32u(DisasContext *s, DisasFields *f, DisasOps *o)
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o->in2 = tcg_const_i64((uint32_t)get_field(f, i2));
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}
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static void in2_i2_16u_shl(DisasContext *s, DisasFields *f, DisasOps *o)
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{
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uint64_t i2 = (uint16_t)get_field(f, i2);
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o->in2 = tcg_const_i64(i2 << s->insn->data);
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}
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static void in2_i2_32u_shl(DisasContext *s, DisasFields *f, DisasOps *o)
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{
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uint64_t i2 = (uint32_t)get_field(f, i2);
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o->in2 = tcg_const_i64(i2 << s->insn->data);
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}
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/* ====================================================================== */
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/* Find opc within the table of insns. This is formulated as a switch
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