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TriCore bugfixes
-----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCgAGBQJVGTZCAAoJEArSxjlracoUUqwQAM5kEsNYhd3T+jRhr8+/blPX yr5YW1VXgZuzLtflr4Y0SD4XQfn7FNFIrMYrGL8dUo/pUgEFObWwNJuwy/b4yyP6 jqcmeswzYMuJ+hgr6EFWhpOVu4N9q0gtJBZpis9c4mT//TaUOzzMIQrrLAmo0vMy KlbCaTbGZYhxdB0zmMcRekKpTn15asiNqCjJ4Jk6ut9URHq9VK7rQF4jC4/8yxhc 9y0xDHBgfUChtq7mSLc8NgD9AohQ+oRZk1z/n33bfXetFh0vLHaFPwG4xbZTqheh ZZY0EQxWc7o9sAT4raOjmxkrnjPzBd8tbDyx5Eyzd724mHshQ60VHETqP95r9TMl B4QNL1NOImpTpqFg4Wb1njcpqVAWmlvNxeFjyym4LxjOHeqLrfsuP3xW7bOfuja/ naZzdxP0VqTBMfpEFUqGTkjKOSo40oqZW8usWiY1bGZqUnfWMV2Jyj6tZDaKe41n SGWXESwVviFYli9SyXO0sUsOHgG6Vf0cgZV9fKldIuGcl/NGpLfuX8wecylLSOzL vbd2NpQWREdozWd8hBq7zHW2LAjoKCp+lKnjl7d+hb2AZtlUrrC+YX5sYoA9R3/P gvdr05//Q5TaO8eSZ0WXIV3a6xboNRdoWb2v58sVJ8nKYonZv3B8PxFk3ZoqGG6l v/KI9h0XNIk9uO/uwj/j =6j+6 -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/bkoppelmann/tags/pull-tricore-20150330' into staging TriCore bugfixes # gpg: Signature made Mon Mar 30 12:40:50 2015 BST using RSA key ID 6B69CA14 # gpg: Good signature from "Bastian Koppelmann <kbastian@mail.uni-paderborn.de>" * remotes/bkoppelmann/tags/pull-tricore-20150330: target-tricore: fix CACHEA/I_POSTINC/PREINC using data register.. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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commit
adbeb458ee
@ -4509,14 +4509,14 @@ static void decode_bo_addrmode_post_pre_base(CPUTriCoreState *env,
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case OPC2_32_BO_CACHEA_I_POSTINC:
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/* instruction to access the cache, but we still need to handle
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the addressing mode */
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tcg_gen_addi_tl(cpu_gpr_d[r2], cpu_gpr_d[r2], off10);
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tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);
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break;
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case OPC2_32_BO_CACHEA_WI_PREINC:
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case OPC2_32_BO_CACHEA_W_PREINC:
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case OPC2_32_BO_CACHEA_I_PREINC:
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/* instruction to access the cache, but we still need to handle
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the addressing mode */
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tcg_gen_addi_tl(cpu_gpr_d[r2], cpu_gpr_d[r2], off10);
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tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);
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break;
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case OPC2_32_BO_CACHEI_WI_SHORTOFF:
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case OPC2_32_BO_CACHEI_W_SHORTOFF:
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@ -4526,13 +4526,13 @@ static void decode_bo_addrmode_post_pre_base(CPUTriCoreState *env,
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case OPC2_32_BO_CACHEI_W_POSTINC:
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case OPC2_32_BO_CACHEI_WI_POSTINC:
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if (tricore_feature(env, TRICORE_FEATURE_131)) {
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tcg_gen_addi_tl(cpu_gpr_d[r2], cpu_gpr_d[r2], off10);
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tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);
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} /* TODO: else raise illegal opcode trap */
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break;
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case OPC2_32_BO_CACHEI_W_PREINC:
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case OPC2_32_BO_CACHEI_WI_PREINC:
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if (tricore_feature(env, TRICORE_FEATURE_131)) {
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tcg_gen_addi_tl(cpu_gpr_d[r2], cpu_gpr_d[r2], off10);
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tcg_gen_addi_tl(cpu_gpr_a[r2], cpu_gpr_a[r2], off10);
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} /* TODO: else raise illegal opcode trap */
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break;
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case OPC2_32_BO_ST_A_SHORTOFF:
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