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Fix APB
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6265 c046a42c-6fe2-441c-8c8c-71466251a162
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parent
27a3deca51
commit
a94fd955eb
36
hw/apb_pci.c
36
hw/apb_pci.c
@ -22,12 +22,23 @@
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* THE SOFTWARE.
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*/
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/* XXX This file and most of its contests are somewhat misnamed. The
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/* XXX This file and most of its contents are somewhat misnamed. The
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Ultrasparc PCI host is called the PCI Bus Module (PBM). The APB is
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the secondary PCI bridge. */
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#include "hw.h"
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#include "pci.h"
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/* debug APB */
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//#define DEBUG_APB
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#ifdef DEBUG_APB
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#define APB_DPRINTF(fmt, args...) \
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do { printf("APB: " fmt , ##args); } while (0)
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#else
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#define APB_DPRINTF(fmt, args...)
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#endif
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typedef target_phys_addr_t pci_addr_t;
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#include "pci_host.h"
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@ -37,13 +48,13 @@ static void pci_apb_config_writel (void *opaque, target_phys_addr_t addr,
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uint32_t val)
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{
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APBState *s = opaque;
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int i;
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for (i = 11; i < 32; i++) {
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if ((val & (1 << i)) != 0)
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break;
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}
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s->config_reg = (1 << 16) | (val & 0x7FC) | (i << 11);
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#ifdef TARGET_WORDS_BIGENDIAN
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val = bswap32(val);
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#endif
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APB_DPRINTF("config_writel addr " TARGET_FMT_plx " val %x\n", addr,
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val);
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s->config_reg = val;
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}
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static uint32_t pci_apb_config_readl (void *opaque,
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@ -51,10 +62,13 @@ static uint32_t pci_apb_config_readl (void *opaque,
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{
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APBState *s = opaque;
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uint32_t val;
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int devfn;
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devfn = (s->config_reg >> 8) & 0xFF;
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val = (1 << (devfn >> 3)) | ((devfn & 0x07) << 8) | (s->config_reg & 0xFC);
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val = s->config_reg;
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#ifdef TARGET_WORDS_BIGENDIAN
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val = bswap32(val);
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#endif
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APB_DPRINTF("config_readl addr " TARGET_FMT_plx " val %x\n", addr,
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val);
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return val;
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}
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@ -259,5 +273,5 @@ PCIBus *pci_apb_init(target_phys_addr_t special_base,
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"Advanced PCI Bus secondary bridge 1");
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pci_bridge_init(s->bus, 9, 0x108e5000, pci_apb_map_irq,
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"Advanced PCI Bus secondary bridge 2");
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return secondary;
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return s->bus;
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}
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@ -465,8 +465,9 @@ static void sun4uv_init(ram_addr_t RAM_size, int vga_ram_size,
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pci_bus = pci_apb_init(APB_SPECIAL_BASE, APB_MEM_BASE, NULL);
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isa_mem_base = VGA_BASE;
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vga_ram_offset = qemu_ram_alloc(vga_ram_size);
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pci_cirrus_vga_init(pci_bus, ds, phys_ram_base + vga_ram_offset,
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vga_ram_offset, vga_ram_size);
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pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_offset,
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vga_ram_offset, vga_ram_size,
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0, 0);
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i = 0;
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if (hwdef->console_serial_base) {
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