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target/loongarch: Add avail_IOCSR to check iocsr instructions
Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20230822032724.1353391-16-gaosong@loongson.cn> Message-Id: <20230822072219.35719-1-philmd@linaro.org>
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@ -312,14 +312,14 @@ static bool gen_iocsrwr(DisasContext *ctx, arg_rr *a,
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return true;
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}
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TRANS(iocsrrd_b, ALL, gen_iocsrrd, gen_helper_iocsrrd_b)
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TRANS(iocsrrd_h, ALL, gen_iocsrrd, gen_helper_iocsrrd_h)
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TRANS(iocsrrd_w, ALL, gen_iocsrrd, gen_helper_iocsrrd_w)
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TRANS(iocsrrd_d, ALL, gen_iocsrrd, gen_helper_iocsrrd_d)
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TRANS(iocsrwr_b, ALL, gen_iocsrwr, gen_helper_iocsrwr_b)
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TRANS(iocsrwr_h, ALL, gen_iocsrwr, gen_helper_iocsrwr_h)
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TRANS(iocsrwr_w, ALL, gen_iocsrwr, gen_helper_iocsrwr_w)
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TRANS(iocsrwr_d, ALL, gen_iocsrwr, gen_helper_iocsrwr_d)
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TRANS(iocsrrd_b, IOCSR, gen_iocsrrd, gen_helper_iocsrrd_b)
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TRANS(iocsrrd_h, IOCSR, gen_iocsrrd, gen_helper_iocsrrd_h)
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TRANS(iocsrrd_w, IOCSR, gen_iocsrrd, gen_helper_iocsrrd_w)
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TRANS(iocsrrd_d, IOCSR, gen_iocsrrd, gen_helper_iocsrrd_d)
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TRANS(iocsrwr_b, IOCSR, gen_iocsrwr, gen_helper_iocsrwr_b)
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TRANS(iocsrwr_h, IOCSR, gen_iocsrwr, gen_helper_iocsrwr_h)
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TRANS(iocsrwr_w, IOCSR, gen_iocsrwr, gen_helper_iocsrwr_w)
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TRANS(iocsrwr_d, IOCSR, gen_iocsrwr, gen_helper_iocsrwr_d)
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static void check_mmu_idx(DisasContext *ctx)
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{
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@ -23,7 +23,7 @@
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#define avail_LSPW(C) (FIELD_EX32((C)->cpucfg2, CPUCFG2, LSPW))
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#define avail_LAM(C) (FIELD_EX32((C)->cpucfg2, CPUCFG2, LAM))
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#define avail_LSX(C) (FIELD_EX32((C)->cpucfg2, CPUCFG2, LSX))
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#define avail_IOCSR(C) (FIELD_EX32((C)->cpucfg1, CPUCFG1, IOCSR))
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/*
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* If an operation is being performed on less than TARGET_LONG_BITS,
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