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s390x/tcg: Implement VECTOR SIGN EXTEND TO DOUBLEWORD
Load both elements signed and store them into the two 64 bit elements. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20190307121539.12842-27-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
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@ -1032,6 +1032,8 @@
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E(0xe71a, VSCEG, VRV, V, la2, 0, 0, 0, vsce, 0, ES_64, IF_VEC)
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E(0xe71a, VSCEG, VRV, V, la2, 0, 0, 0, vsce, 0, ES_64, IF_VEC)
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/* VECTOR SELECT */
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/* VECTOR SELECT */
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F(0xe78d, VSEL, VRR_e, V, 0, 0, 0, 0, vsel, 0, IF_VEC)
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F(0xe78d, VSEL, VRR_e, V, 0, 0, 0, 0, vsel, 0, IF_VEC)
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/* VECTOR SIGN EXTEND TO DOUBLEWORD */
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F(0xe75f, VSEG, VRR_a, V, 0, 0, 0, 0, vseg, 0, IF_VEC)
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#ifndef CONFIG_USER_ONLY
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#ifndef CONFIG_USER_ONLY
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/* COMPARE AND SWAP AND PURGE */
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/* COMPARE AND SWAP AND PURGE */
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@ -784,3 +784,36 @@ static DisasJumpType op_vsel(DisasContext *s, DisasOps *o)
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get_field(s->fields, v3), get_field(s->fields, v4), &gvec_op);
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get_field(s->fields, v3), get_field(s->fields, v4), &gvec_op);
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return DISAS_NEXT;
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return DISAS_NEXT;
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}
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}
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static DisasJumpType op_vseg(DisasContext *s, DisasOps *o)
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{
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const uint8_t es = get_field(s->fields, m3);
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int idx1, idx2;
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TCGv_i64 tmp;
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switch (es) {
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case ES_8:
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idx1 = 7;
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idx2 = 15;
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break;
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case ES_16:
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idx1 = 3;
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idx2 = 7;
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break;
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case ES_32:
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idx1 = 1;
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idx2 = 3;
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break;
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default:
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gen_program_exception(s, PGM_SPECIFICATION);
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return DISAS_NORETURN;
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}
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tmp = tcg_temp_new_i64();
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read_vec_element_i64(tmp, get_field(s->fields, v2), idx1, es | MO_SIGN);
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write_vec_element_i64(tmp, get_field(s->fields, v1), 0, ES_64);
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read_vec_element_i64(tmp, get_field(s->fields, v2), idx2, es | MO_SIGN);
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write_vec_element_i64(tmp, get_field(s->fields, v1), 1, ES_64);
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tcg_temp_free_i64(tmp);
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return DISAS_NEXT;
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}
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