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https://github.com/qemu/qemu.git
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VM load/save support for PPC devices
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6142 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
blueswir1
parent
ac0df51d7b
commit
9b64997f46
56
hw/adb.c
56
hw/adb.c
@ -262,6 +262,31 @@ static int adb_kbd_request(ADBDevice *d, uint8_t *obuf,
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return olen;
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}
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static void adb_kbd_save(QEMUFile *f, void *opaque)
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{
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KBDState *s = (KBDState *)opaque;
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qemu_put_buffer(f, s->data, sizeof(s->data));
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qemu_put_sbe32s(f, &s->rptr);
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qemu_put_sbe32s(f, &s->wptr);
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qemu_put_sbe32s(f, &s->count);
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}
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static int adb_kbd_load(QEMUFile *f, void *opaque, int version_id)
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{
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KBDState *s = (KBDState *)opaque;
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if (version_id != 1)
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return -EINVAL;
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qemu_get_buffer(f, s->data, sizeof(s->data));
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qemu_get_sbe32s(f, &s->rptr);
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qemu_get_sbe32s(f, &s->wptr);
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qemu_get_sbe32s(f, &s->count);
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return 0;
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}
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static int adb_kbd_reset(ADBDevice *d)
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{
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KBDState *s = d->opaque;
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@ -281,6 +306,8 @@ void adb_kbd_init(ADBBusState *bus)
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d = adb_register_device(bus, ADB_KEYBOARD, adb_kbd_request,
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adb_kbd_reset, s);
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qemu_add_kbd_event_handler(adb_kbd_put_keycode, d);
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register_savevm("adb_kbd", -1, 1, adb_kbd_save,
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adb_kbd_load, s);
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}
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/***************************************************************/
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@ -413,6 +440,33 @@ static int adb_mouse_reset(ADBDevice *d)
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return 0;
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}
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static void adb_mouse_save(QEMUFile *f, void *opaque)
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{
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MouseState *s = (MouseState *)opaque;
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qemu_put_sbe32s(f, &s->buttons_state);
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qemu_put_sbe32s(f, &s->last_buttons_state);
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qemu_put_sbe32s(f, &s->dx);
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qemu_put_sbe32s(f, &s->dy);
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qemu_put_sbe32s(f, &s->dz);
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}
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static int adb_mouse_load(QEMUFile *f, void *opaque, int version_id)
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{
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MouseState *s = (MouseState *)opaque;
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if (version_id != 1)
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return -EINVAL;
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qemu_get_sbe32s(f, &s->buttons_state);
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qemu_get_sbe32s(f, &s->last_buttons_state);
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qemu_get_sbe32s(f, &s->dx);
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qemu_get_sbe32s(f, &s->dy);
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qemu_get_sbe32s(f, &s->dz);
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return 0;
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}
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void adb_mouse_init(ADBBusState *bus)
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{
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ADBDevice *d;
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@ -422,4 +476,6 @@ void adb_mouse_init(ADBBusState *bus)
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d = adb_register_device(bus, ADB_MOUSE, adb_mouse_request,
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adb_mouse_reset, s);
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qemu_add_mouse_event_handler(adb_mouse_event, d, 0, "QEMU ADB Mouse");
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register_savevm("adb_mouse", -1, 1, adb_mouse_save,
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adb_mouse_load, s);
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}
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74
hw/cuda.c
74
hw/cuda.c
@ -633,6 +633,79 @@ static CPUReadMemoryFunc *cuda_read[] = {
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&cuda_readl,
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};
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static void cuda_save_timer(QEMUFile *f, CUDATimer *s)
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{
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qemu_put_be16s(f, &s->latch);
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qemu_put_be16s(f, &s->counter_value);
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qemu_put_sbe64s(f, &s->load_time);
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qemu_put_sbe64s(f, &s->next_irq_time);
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if (s->timer)
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qemu_put_timer(f, s->timer);
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}
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static void cuda_save(QEMUFile *f, void *opaque)
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{
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CUDAState *s = (CUDAState *)opaque;
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qemu_put_ubyte(f, s->b);
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qemu_put_ubyte(f, s->a);
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qemu_put_ubyte(f, s->dirb);
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qemu_put_ubyte(f, s->dira);
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qemu_put_ubyte(f, s->sr);
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qemu_put_ubyte(f, s->acr);
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qemu_put_ubyte(f, s->pcr);
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qemu_put_ubyte(f, s->ifr);
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qemu_put_ubyte(f, s->ier);
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qemu_put_ubyte(f, s->anh);
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qemu_put_sbe32s(f, &s->data_in_size);
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qemu_put_sbe32s(f, &s->data_in_index);
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qemu_put_sbe32s(f, &s->data_out_index);
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qemu_put_ubyte(f, s->autopoll);
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qemu_put_buffer(f, s->data_in, sizeof(s->data_in));
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qemu_put_buffer(f, s->data_out, sizeof(s->data_out));
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cuda_save_timer(f, &s->timers[0]);
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cuda_save_timer(f, &s->timers[1]);
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}
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static void cuda_load_timer(QEMUFile *f, CUDATimer *s)
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{
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qemu_get_be16s(f, &s->latch);
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qemu_get_be16s(f, &s->counter_value);
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qemu_get_sbe64s(f, &s->load_time);
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qemu_get_sbe64s(f, &s->next_irq_time);
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if (s->timer)
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qemu_get_timer(f, s->timer);
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}
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static int cuda_load(QEMUFile *f, void *opaque, int version_id)
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{
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CUDAState *s = (CUDAState *)opaque;
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if (version_id != 1)
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return -EINVAL;
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s->b = qemu_get_ubyte(f);
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s->a = qemu_get_ubyte(f);
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s->dirb = qemu_get_ubyte(f);
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s->dira = qemu_get_ubyte(f);
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s->sr = qemu_get_ubyte(f);
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s->acr = qemu_get_ubyte(f);
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s->pcr = qemu_get_ubyte(f);
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s->ifr = qemu_get_ubyte(f);
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s->ier = qemu_get_ubyte(f);
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s->anh = qemu_get_ubyte(f);
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qemu_get_sbe32s(f, &s->data_in_size);
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qemu_get_sbe32s(f, &s->data_in_index);
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qemu_get_sbe32s(f, &s->data_out_index);
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s->autopoll = qemu_get_ubyte(f);
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qemu_get_buffer(f, s->data_in, sizeof(s->data_in));
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qemu_get_buffer(f, s->data_out, sizeof(s->data_out));
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cuda_load_timer(f, &s->timers[0]);
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cuda_load_timer(f, &s->timers[1]);
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return 0;
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}
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static void cuda_reset(void *opaque)
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{
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CUDAState *s = opaque;
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@ -673,6 +746,7 @@ void cuda_init (int *cuda_mem_index, qemu_irq irq)
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s->adb_poll_timer = qemu_new_timer(vm_clock, cuda_adb_poll, s);
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*cuda_mem_index = cpu_register_io_memory(0, cuda_read, cuda_write, s);
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register_savevm("cuda", -1, 1, cuda_save, cuda_load, s);
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qemu_register_reset(cuda_reset, s);
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cuda_reset(s);
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}
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@ -105,6 +105,23 @@ static void pci_grackle_set_irq(qemu_irq *pic, int irq_num, int level)
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qemu_set_irq(pic[irq_num + 0x15], level);
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}
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static void pci_grackle_save(QEMUFile* f, void *opaque)
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{
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PCIDevice *d = opaque;
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pci_device_save(d, f);
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}
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static int pci_grackle_load(QEMUFile* f, void *opaque, int version_id)
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{
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PCIDevice *d = opaque;
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if (version_id != 1)
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return -EINVAL;
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return pci_device_load(d, f);
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}
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static void pci_grackle_reset(void *opaque)
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{
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}
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@ -164,6 +181,7 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic)
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d->config[0x26] = 0x00; // prefetchable_memory_limit
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d->config[0x27] = 0x85;
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#endif
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register_savevm("grackle", 0, 1, pci_grackle_save, pci_grackle_load, d);
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qemu_register_reset(pci_grackle_reset, d);
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pci_grackle_reset(d);
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@ -165,6 +165,43 @@ static void heathrow_pic_set_irq(void *opaque, int num, int level)
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heathrow_pic_update(s);
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}
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static void heathrow_pic_save_one(QEMUFile *f, HeathrowPIC *s)
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{
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qemu_put_be32s(f, &s->events);
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qemu_put_be32s(f, &s->mask);
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qemu_put_be32s(f, &s->levels);
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qemu_put_be32s(f, &s->level_triggered);
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}
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static void heathrow_pic_save(QEMUFile *f, void *opaque)
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{
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HeathrowPICS *s = (HeathrowPICS *)opaque;
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heathrow_pic_save_one(f, &s->pics[0]);
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heathrow_pic_save_one(f, &s->pics[1]);
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}
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static void heathrow_pic_load_one(QEMUFile *f, HeathrowPIC *s)
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{
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qemu_get_be32s(f, &s->events);
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qemu_get_be32s(f, &s->mask);
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qemu_get_be32s(f, &s->levels);
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qemu_get_be32s(f, &s->level_triggered);
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}
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static int heathrow_pic_load(QEMUFile *f, void *opaque, int version_id)
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{
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HeathrowPICS *s = (HeathrowPICS *)opaque;
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if (version_id != 1)
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return -EINVAL;
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heathrow_pic_load_one(f, &s->pics[0]);
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heathrow_pic_load_one(f, &s->pics[1]);
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return 0;
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}
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static void heathrow_pic_reset_one(HeathrowPIC *s)
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{
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memset(s, '\0', sizeof(HeathrowPIC));
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@ -191,6 +228,8 @@ qemu_irq *heathrow_pic_init(int *pmem_index,
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s->irqs = irqs[0];
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*pmem_index = cpu_register_io_memory(0, pic_read, pic_write, s);
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register_savevm("heathrow_pic", -1, 1, heathrow_pic_save,
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heathrow_pic_load, s);
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qemu_register_reset(heathrow_pic_reset, s);
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heathrow_pic_reset(s);
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return qemu_allocate_irqs(heathrow_pic_set_irq, s, 64);
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170
hw/ide.c
170
hw/ide.c
@ -3058,6 +3058,71 @@ static void bmdma_map(PCIDevice *pci_dev, int region_num,
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}
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}
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static void pci_ide_save(QEMUFile* f, void *opaque)
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{
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PCIIDEState *d = opaque;
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int i;
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pci_device_save(&d->dev, f);
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for(i = 0; i < 2; i++) {
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BMDMAState *bm = &d->bmdma[i];
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qemu_put_8s(f, &bm->cmd);
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qemu_put_8s(f, &bm->status);
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qemu_put_be32s(f, &bm->addr);
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/* XXX: if a transfer is pending, we do not save it yet */
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}
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/* per IDE interface data */
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for(i = 0; i < 2; i++) {
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IDEState *s = &d->ide_if[i * 2];
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uint8_t drive1_selected;
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qemu_put_8s(f, &s->cmd);
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drive1_selected = (s->cur_drive != s);
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qemu_put_8s(f, &drive1_selected);
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}
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/* per IDE drive data */
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for(i = 0; i < 4; i++) {
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ide_save(f, &d->ide_if[i]);
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}
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}
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static int pci_ide_load(QEMUFile* f, void *opaque, int version_id)
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{
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PCIIDEState *d = opaque;
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int ret, i;
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if (version_id != 1)
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return -EINVAL;
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ret = pci_device_load(&d->dev, f);
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if (ret < 0)
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return ret;
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for(i = 0; i < 2; i++) {
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BMDMAState *bm = &d->bmdma[i];
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qemu_get_8s(f, &bm->cmd);
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qemu_get_8s(f, &bm->status);
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qemu_get_be32s(f, &bm->addr);
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/* XXX: if a transfer is pending, we do not save it yet */
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}
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/* per IDE interface data */
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for(i = 0; i < 2; i++) {
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IDEState *s = &d->ide_if[i * 2];
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uint8_t drive1_selected;
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qemu_get_8s(f, &s->cmd);
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qemu_get_8s(f, &drive1_selected);
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s->cur_drive = &d->ide_if[i * 2 + (drive1_selected != 0)];
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}
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/* per IDE drive data */
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for(i = 0; i < 4; i++) {
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ide_load(f, &d->ide_if[i]);
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}
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return 0;
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}
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/* XXX: call it also when the MRDMODE is changed from the PCI config
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registers */
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static void cmd646_update_irq(PCIIDEState *d)
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@ -3145,75 +3210,11 @@ void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
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ide_init2(&d->ide_if[0], hd_table[0], hd_table[1], irq[0]);
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ide_init2(&d->ide_if[2], hd_table[2], hd_table[3], irq[1]);
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register_savevm("ide", 0, 1, pci_ide_save, pci_ide_load, d);
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qemu_register_reset(cmd646_reset, d);
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cmd646_reset(d);
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}
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static void pci_ide_save(QEMUFile* f, void *opaque)
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{
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PCIIDEState *d = opaque;
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int i;
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pci_device_save(&d->dev, f);
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for(i = 0; i < 2; i++) {
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BMDMAState *bm = &d->bmdma[i];
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qemu_put_8s(f, &bm->cmd);
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qemu_put_8s(f, &bm->status);
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qemu_put_be32s(f, &bm->addr);
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/* XXX: if a transfer is pending, we do not save it yet */
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}
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/* per IDE interface data */
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for(i = 0; i < 2; i++) {
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IDEState *s = &d->ide_if[i * 2];
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uint8_t drive1_selected;
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qemu_put_8s(f, &s->cmd);
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drive1_selected = (s->cur_drive != s);
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qemu_put_8s(f, &drive1_selected);
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}
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/* per IDE drive data */
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for(i = 0; i < 4; i++) {
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ide_save(f, &d->ide_if[i]);
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}
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}
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static int pci_ide_load(QEMUFile* f, void *opaque, int version_id)
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{
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PCIIDEState *d = opaque;
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int ret, i;
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if (version_id != 1)
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return -EINVAL;
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ret = pci_device_load(&d->dev, f);
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if (ret < 0)
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return ret;
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for(i = 0; i < 2; i++) {
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BMDMAState *bm = &d->bmdma[i];
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qemu_get_8s(f, &bm->cmd);
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qemu_get_8s(f, &bm->status);
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qemu_get_be32s(f, &bm->addr);
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/* XXX: if a transfer is pending, we do not save it yet */
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}
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/* per IDE interface data */
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for(i = 0; i < 2; i++) {
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IDEState *s = &d->ide_if[i * 2];
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uint8_t drive1_selected;
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qemu_get_8s(f, &s->cmd);
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qemu_get_8s(f, &drive1_selected);
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s->cur_drive = &d->ide_if[i * 2 + (drive1_selected != 0)];
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}
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/* per IDE drive data */
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for(i = 0; i < 4; i++) {
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ide_load(f, &d->ide_if[i]);
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}
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return 0;
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}
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static void piix3_reset(void *opaque)
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{
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PCIIDEState *d = opaque;
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@ -3417,6 +3418,44 @@ static CPUReadMemoryFunc *pmac_ide_read[] = {
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pmac_ide_readl,
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};
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static void pmac_ide_save(QEMUFile *f, void *opaque)
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{
|
||||
IDEState *s = (IDEState *)opaque;
|
||||
uint8_t drive1_selected;
|
||||
unsigned int i;
|
||||
|
||||
/* per IDE interface data */
|
||||
qemu_put_8s(f, &s->cmd);
|
||||
drive1_selected = (s->cur_drive != s);
|
||||
qemu_put_8s(f, &drive1_selected);
|
||||
|
||||
/* per IDE drive data */
|
||||
for(i = 0; i < 2; i++) {
|
||||
ide_save(f, &s[i]);
|
||||
}
|
||||
}
|
||||
|
||||
static int pmac_ide_load(QEMUFile *f, void *opaque, int version_id)
|
||||
{
|
||||
IDEState *s = (IDEState *)opaque;
|
||||
uint8_t drive1_selected;
|
||||
unsigned int i;
|
||||
|
||||
if (version_id != 1)
|
||||
return -EINVAL;
|
||||
|
||||
/* per IDE interface data */
|
||||
qemu_get_8s(f, &s->cmd);
|
||||
qemu_get_8s(f, &drive1_selected);
|
||||
s->cur_drive = &s[(drive1_selected != 0)];
|
||||
|
||||
/* per IDE drive data */
|
||||
for(i = 0; i < 2; i++) {
|
||||
ide_load(f, &s[i]);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void pmac_ide_reset(void *opaque)
|
||||
{
|
||||
IDEState *s = (IDEState *)opaque;
|
||||
@ -3438,6 +3477,7 @@ int pmac_ide_init (BlockDriverState **hd_table, qemu_irq irq)
|
||||
|
||||
pmac_ide_memory = cpu_register_io_memory(0, pmac_ide_read,
|
||||
pmac_ide_write, &ide_if[0]);
|
||||
register_savevm("ide", 0, 1, pmac_ide_save, pmac_ide_load, &ide_if[0]);
|
||||
qemu_register_reset(pmac_ide_reset, &ide_if[0]);
|
||||
pmac_ide_reset(&ide_if[0]);
|
||||
return pmac_ide_memory;
|
||||
|
||||
@ -88,6 +88,18 @@ static CPUReadMemoryFunc *dbdma_read[] = {
|
||||
&dbdma_readl,
|
||||
};
|
||||
|
||||
static void dbdma_save(QEMUFile *f, void *opaque)
|
||||
{
|
||||
}
|
||||
|
||||
static int dbdma_load(QEMUFile *f, void *opaque, int version_id)
|
||||
{
|
||||
if (version_id != 1)
|
||||
return -EINVAL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void dbdma_reset(void *opaque)
|
||||
{
|
||||
}
|
||||
@ -95,6 +107,7 @@ static void dbdma_reset(void *opaque)
|
||||
void dbdma_init (int *dbdma_mem_index)
|
||||
{
|
||||
*dbdma_mem_index = cpu_register_io_memory(0, dbdma_read, dbdma_write, NULL);
|
||||
register_savevm("dbdma", -1, 1, dbdma_save, dbdma_load, NULL);
|
||||
qemu_register_reset(dbdma_reset, NULL);
|
||||
dbdma_reset(NULL);
|
||||
}
|
||||
|
||||
@ -104,6 +104,25 @@ static CPUReadMemoryFunc *nvram_read[] = {
|
||||
&macio_nvram_readb,
|
||||
};
|
||||
|
||||
static void macio_nvram_save(QEMUFile *f, void *opaque)
|
||||
{
|
||||
MacIONVRAMState *s = (MacIONVRAMState *)opaque;
|
||||
|
||||
qemu_put_buffer(f, s->data, s->size);
|
||||
}
|
||||
|
||||
static int macio_nvram_load(QEMUFile *f, void *opaque, int version_id)
|
||||
{
|
||||
MacIONVRAMState *s = (MacIONVRAMState *)opaque;
|
||||
|
||||
if (version_id != 1)
|
||||
return -EINVAL;
|
||||
|
||||
qemu_get_buffer(f, s->data, s->size);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void macio_nvram_reset(void *opaque)
|
||||
{
|
||||
}
|
||||
@ -124,6 +143,8 @@ MacIONVRAMState *macio_nvram_init (int *mem_index, target_phys_addr_t size)
|
||||
|
||||
s->mem_index = cpu_register_io_memory(0, nvram_read, nvram_write, s);
|
||||
*mem_index = s->mem_index;
|
||||
register_savevm("macio_nvram", -1, 1, macio_nvram_save, macio_nvram_load,
|
||||
s);
|
||||
qemu_register_reset(macio_nvram_reset, s);
|
||||
macio_nvram_reset(s);
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user