mirrors/qemu
0
0
Fork 0
mirror of https://github.com/qemu/qemu.git synced 2024-11-27 13:53:45 +08:00
Code Issues Packages Projects Releases Wiki Activity

hw/sh4: Extract timer definitions to 'hw/timer/tmu012.h'

Browse Source 
Extract timer definitions to 'hw/timer/tmu012.h'.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
This commit is contained in:
Philippe Mathieu-Daudé 2020-05-04 10:16:52 +02:00
parent ba2afd0eb2
commit 95f4dc444a
4 changed files with 26 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
hw/sh4/sh7750.c
View File

@ -30,6 +30,7 @@
#include "sh7750_regs.h"
#include "sh7750_regnames.h"
#include "hw/sh4/sh_intc.h"
#include "hw/timer/tmu012.h"
#include "cpu.h"
#include "exec/exec-all.h"

2
hw/timer/sh_timer.c
View File

@ -9,10 +9,12 @@
*/
#include "qemu/osdep.h"
#include "exec/memory.h"
#include "hw/hw.h"
#include "hw/irq.h"
#include "hw/sh4/sh.h"
#include "qemu/timer.h"
#include "hw/timer/tmu012.h"
#include "hw/ptimer.h"
//#define DEBUG_TIMER

9
include/hw/sh4/sh.h
View File

@ -27,15 +27,6 @@ typedef struct {
int sh7750_register_io_device(struct SH7750State *s,
sh7750_io_device * device);
/* sh_timer.c */
#define TMU012_FEAT_TOCR (1 << 0)
#define TMU012_FEAT_3CHAN (1 << 1)
#define TMU012_FEAT_EXTCLK (1 << 2)
void tmu012_init(MemoryRegion *sysmem, hwaddr base,
int feat, uint32_t freq,
qemu_irq ch0_irq, qemu_irq ch1_irq,
qemu_irq ch2_irq0, qemu_irq ch2_irq1);
/* sh_serial.c */
#define SH_SERIAL_FEAT_SCIF (1 << 0)

23
include/hw/timer/tmu012.h Normal file
View File

@ -0,0 +1,23 @@
/*
* SuperH Timer
*
* Copyright (c) 2007 Magnus Damm
*
* This code is licensed under the GPL.
*/
#ifndef HW_TIMER_TMU012_H
#define HW_TIMER_TMU012_H
#include "exec/hwaddr.h"
#define TMU012_FEAT_TOCR (1 << 0)
#define TMU012_FEAT_3CHAN (1 << 1)
#define TMU012_FEAT_EXTCLK (1 << 2)
void tmu012_init(MemoryRegion *sysmem, hwaddr base,
int feat, uint32_t freq,
qemu_irq ch0_irq, qemu_irq ch1_irq,
qemu_irq ch2_irq0, qemu_irq ch2_irq1);
#endif