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i2c: Split smbus into parts
smbus.c and smbus.h had device side code, master side code, and smbus.h has some smbus_eeprom.c definitions. Split them into separate files. Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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12
MAINTAINERS
12
MAINTAINERS
@ -2160,6 +2160,18 @@ M: Viktor Prutyanov <viktor.prutyanov@phystech.edu>
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S: Maintained
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F: contrib/elf2dmp/
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I2C and SMBus
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M: Corey Minyard <cminyard@mvista.com>
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S: Maintained
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F: hw/i2c/core.c
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F: hw/i2c/smbus_slave.c
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F: hw/i2c/smbus_master.c
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F: hw/i2c/smbus_eeprom.c
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F: include/hw/i2c/i2c.h
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F: include/hw/i2c/smbus_master.h
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F: include/hw/i2c/smbus_slave.h
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F: include/hw/i2c/smbus_eeprom.h
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Usermode Emulation
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------------------
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Overall
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@ -18,7 +18,7 @@
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#include "hw/arm/aspeed.h"
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#include "hw/arm/aspeed_soc.h"
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#include "hw/boards.h"
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#include "hw/i2c/smbus.h"
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#include "hw/i2c/smbus_eeprom.h"
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#include "qemu/log.h"
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#include "sysemu/block-backend.h"
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#include "hw/loader.h"
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@ -1,4 +1,4 @@
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common-obj-$(CONFIG_I2C) += core.o smbus.o
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common-obj-$(CONFIG_I2C) += core.o smbus_slave.o smbus_master.o
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common-obj-$(CONFIG_SMBUS_EEPROM) += smbus_eeprom.o
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common-obj-$(CONFIG_DDC) += i2c-ddc.o
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common-obj-$(CONFIG_VERSATILE_I2C) += versatile_i2c.o
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@ -20,7 +20,7 @@
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#include "qemu/osdep.h"
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#include "hw/hw.h"
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#include "hw/i2c/pm_smbus.h"
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#include "hw/i2c/smbus.h"
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#include "hw/i2c/smbus_master.h"
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#define SMBHSTSTS 0x00
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#define SMBHSTCNT 0x02
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@ -27,7 +27,8 @@
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#include "qapi/error.h"
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#include "hw/hw.h"
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#include "hw/i2c/i2c.h"
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#include "hw/i2c/smbus.h"
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#include "hw/i2c/smbus_slave.h"
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#include "hw/i2c/smbus_eeprom.h"
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//#define DEBUG
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@ -29,8 +29,6 @@
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#include "hw/i2c/pm_smbus.h"
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#include "hw/pci/pci.h"
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#include "sysemu/sysemu.h"
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#include "hw/i2c/i2c.h"
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#include "hw/i2c/smbus.h"
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#include "hw/i386/ich9.h"
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165
hw/i2c/smbus_master.c
Normal file
165
hw/i2c/smbus_master.c
Normal file
@ -0,0 +1,165 @@
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/*
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* QEMU SMBus host (master) emulation.
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*
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* This code emulates SMBus transactions from the master point of view,
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* it runs the individual I2C transaction to do the SMBus protocol
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* over I2C.
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*
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* Copyright (c) 2007 CodeSourcery.
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* Written by Paul Brook
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*
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* This code is licensed under the LGPL.
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*/
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#include "qemu/osdep.h"
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#include "hw/hw.h"
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#include "hw/i2c/i2c.h"
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#include "hw/i2c/smbus_master.h"
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/* Master device commands. */
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int smbus_quick_command(I2CBus *bus, uint8_t addr, int read)
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{
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if (i2c_start_transfer(bus, addr, read)) {
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return -1;
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}
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i2c_end_transfer(bus);
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return 0;
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}
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int smbus_receive_byte(I2CBus *bus, uint8_t addr)
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{
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uint8_t data;
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if (i2c_start_transfer(bus, addr, 1)) {
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return -1;
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}
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data = i2c_recv(bus);
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i2c_nack(bus);
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i2c_end_transfer(bus);
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return data;
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}
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int smbus_send_byte(I2CBus *bus, uint8_t addr, uint8_t data)
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{
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if (i2c_start_transfer(bus, addr, 0)) {
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return -1;
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}
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i2c_send(bus, data);
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i2c_end_transfer(bus);
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return 0;
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}
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int smbus_read_byte(I2CBus *bus, uint8_t addr, uint8_t command)
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{
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uint8_t data;
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if (i2c_start_transfer(bus, addr, 0)) {
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return -1;
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}
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i2c_send(bus, command);
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if (i2c_start_transfer(bus, addr, 1)) {
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i2c_end_transfer(bus);
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return -1;
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}
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data = i2c_recv(bus);
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i2c_nack(bus);
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i2c_end_transfer(bus);
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return data;
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}
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int smbus_write_byte(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t data)
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{
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if (i2c_start_transfer(bus, addr, 0)) {
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return -1;
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}
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i2c_send(bus, command);
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i2c_send(bus, data);
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i2c_end_transfer(bus);
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return 0;
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}
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int smbus_read_word(I2CBus *bus, uint8_t addr, uint8_t command)
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{
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uint16_t data;
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if (i2c_start_transfer(bus, addr, 0)) {
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return -1;
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}
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i2c_send(bus, command);
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if (i2c_start_transfer(bus, addr, 1)) {
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i2c_end_transfer(bus);
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return -1;
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}
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data = i2c_recv(bus);
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data |= i2c_recv(bus) << 8;
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i2c_nack(bus);
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i2c_end_transfer(bus);
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return data;
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}
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int smbus_write_word(I2CBus *bus, uint8_t addr, uint8_t command, uint16_t data)
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{
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if (i2c_start_transfer(bus, addr, 0)) {
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return -1;
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}
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i2c_send(bus, command);
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i2c_send(bus, data & 0xff);
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i2c_send(bus, data >> 8);
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i2c_end_transfer(bus);
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return 0;
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}
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int smbus_read_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data,
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int len, bool recv_len, bool send_cmd)
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{
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int rlen;
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int i;
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if (send_cmd) {
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if (i2c_start_transfer(bus, addr, 0)) {
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return -1;
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}
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i2c_send(bus, command);
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}
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if (i2c_start_transfer(bus, addr, 1)) {
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if (send_cmd) {
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i2c_end_transfer(bus);
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}
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return -1;
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}
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if (recv_len) {
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rlen = i2c_recv(bus);
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} else {
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rlen = len;
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}
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if (rlen > len) {
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rlen = 0;
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}
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for (i = 0; i < rlen; i++) {
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data[i] = i2c_recv(bus);
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}
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i2c_nack(bus);
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i2c_end_transfer(bus);
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return rlen;
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}
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int smbus_write_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data,
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int len, bool send_len)
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{
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int i;
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if (len > 32) {
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len = 32;
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}
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if (i2c_start_transfer(bus, addr, 0)) {
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return -1;
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}
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i2c_send(bus, command);
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if (send_len) {
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i2c_send(bus, len);
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}
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for (i = 0; i < len; i++) {
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i2c_send(bus, data[i]);
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}
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i2c_end_transfer(bus);
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return 0;
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}
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@ -1,6 +1,10 @@
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/*
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* QEMU SMBus device emulation.
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*
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* This code is a helper for SMBus device emulation. It implements an
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* I2C device inteface and runs the SMBus protocol from the device
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* point of view and maps those to simple calls to emulate.
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*
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* Copyright (c) 2007 CodeSourcery.
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* Written by Paul Brook
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*
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@ -12,7 +16,7 @@
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#include "qemu/osdep.h"
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#include "hw/hw.h"
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#include "hw/i2c/i2c.h"
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#include "hw/i2c/smbus.h"
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#include "hw/i2c/smbus_slave.h"
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//#define DEBUG_SMBUS 1
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@ -206,153 +210,6 @@ static int smbus_i2c_send(I2CSlave *s, uint8_t data)
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return 0;
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}
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/* Master device commands. */
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int smbus_quick_command(I2CBus *bus, uint8_t addr, int read)
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{
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if (i2c_start_transfer(bus, addr, read)) {
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return -1;
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}
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i2c_end_transfer(bus);
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return 0;
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}
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int smbus_receive_byte(I2CBus *bus, uint8_t addr)
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{
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uint8_t data;
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if (i2c_start_transfer(bus, addr, 1)) {
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return -1;
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}
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data = i2c_recv(bus);
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i2c_nack(bus);
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i2c_end_transfer(bus);
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return data;
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}
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int smbus_send_byte(I2CBus *bus, uint8_t addr, uint8_t data)
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{
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if (i2c_start_transfer(bus, addr, 0)) {
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return -1;
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}
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i2c_send(bus, data);
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i2c_end_transfer(bus);
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return 0;
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}
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int smbus_read_byte(I2CBus *bus, uint8_t addr, uint8_t command)
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{
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uint8_t data;
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if (i2c_start_transfer(bus, addr, 0)) {
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return -1;
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}
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i2c_send(bus, command);
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if (i2c_start_transfer(bus, addr, 1)) {
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i2c_end_transfer(bus);
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return -1;
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}
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data = i2c_recv(bus);
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i2c_nack(bus);
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i2c_end_transfer(bus);
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return data;
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}
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int smbus_write_byte(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t data)
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{
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if (i2c_start_transfer(bus, addr, 0)) {
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return -1;
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}
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i2c_send(bus, command);
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i2c_send(bus, data);
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i2c_end_transfer(bus);
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return 0;
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}
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int smbus_read_word(I2CBus *bus, uint8_t addr, uint8_t command)
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{
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uint16_t data;
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if (i2c_start_transfer(bus, addr, 0)) {
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return -1;
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}
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i2c_send(bus, command);
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if (i2c_start_transfer(bus, addr, 1)) {
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i2c_end_transfer(bus);
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return -1;
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}
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data = i2c_recv(bus);
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data |= i2c_recv(bus) << 8;
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i2c_nack(bus);
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i2c_end_transfer(bus);
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return data;
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}
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int smbus_write_word(I2CBus *bus, uint8_t addr, uint8_t command, uint16_t data)
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{
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if (i2c_start_transfer(bus, addr, 0)) {
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return -1;
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}
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i2c_send(bus, command);
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i2c_send(bus, data & 0xff);
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i2c_send(bus, data >> 8);
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i2c_end_transfer(bus);
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return 0;
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}
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int smbus_read_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data,
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int len, bool recv_len, bool send_cmd)
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{
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int rlen;
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int i;
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if (send_cmd) {
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if (i2c_start_transfer(bus, addr, 0)) {
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return -1;
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}
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i2c_send(bus, command);
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}
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if (i2c_start_transfer(bus, addr, 1)) {
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if (send_cmd) {
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i2c_end_transfer(bus);
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}
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return -1;
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}
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if (recv_len) {
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rlen = i2c_recv(bus);
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} else {
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rlen = len;
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}
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if (rlen > len) {
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rlen = 0;
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}
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for (i = 0; i < rlen; i++) {
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data[i] = i2c_recv(bus);
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}
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i2c_nack(bus);
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i2c_end_transfer(bus);
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return rlen;
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}
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int smbus_write_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data,
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int len, bool send_len)
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{
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int i;
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if (len > 32)
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len = 32;
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if (i2c_start_transfer(bus, addr, 0)) {
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return -1;
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}
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i2c_send(bus, command);
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if (send_len) {
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i2c_send(bus, len);
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}
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for (i = 0; i < len; i++) {
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i2c_send(bus, data[i]);
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}
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i2c_end_transfer(bus);
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return 0;
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}
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static void smbus_device_class_init(ObjectClass *klass, void *data)
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{
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I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass);
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@ -42,7 +42,7 @@
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#include "sysemu/sysemu.h"
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#include "hw/sysbus.h"
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#include "sysemu/arch_init.h"
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#include "hw/i2c/smbus.h"
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#include "hw/i2c/smbus_eeprom.h"
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#include "hw/xen/xen.h"
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#include "exec/memory.h"
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#include "exec/address-spaces.h"
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@ -33,7 +33,7 @@
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#include "hw/hw.h"
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#include "hw/loader.h"
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#include "sysemu/arch_init.h"
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#include "hw/i2c/smbus.h"
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#include "hw/i2c/smbus_eeprom.h"
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#include "hw/boards.h"
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#include "hw/timer/mc146818rtc.h"
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#include "hw/xen/xen.h"
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@ -14,7 +14,6 @@
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#include "hw/hw.h"
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#include "hw/isa/vt82c686.h"
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#include "hw/i2c/i2c.h"
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#include "hw/i2c/smbus.h"
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#include "hw/pci/pci.h"
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#include "hw/isa/isa.h"
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#include "hw/isa/superio.h"
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@ -28,7 +28,7 @@
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#include "hw/isa/superio.h"
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#include "net/net.h"
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#include "hw/boards.h"
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#include "hw/i2c/smbus.h"
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#include "hw/i2c/smbus_eeprom.h"
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#include "hw/block/flash.h"
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#include "hw/mips/mips.h"
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#include "hw/mips/cpudevs.h"
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@ -33,7 +33,7 @@
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#include "hw/char/serial.h"
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#include "net/net.h"
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#include "hw/boards.h"
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#include "hw/i2c/smbus.h"
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#include "hw/i2c/smbus_eeprom.h"
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#include "hw/block/flash.h"
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#include "hw/mips/mips.h"
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#include "hw/mips/cpudevs.h"
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@ -34,7 +34,7 @@
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#include "hw/sysbus.h"
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#include "hw/char/serial.h"
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#include "hw/i2c/ppc4xx_i2c.h"
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#include "hw/i2c/smbus.h"
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#include "hw/i2c/smbus_eeprom.h"
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#include "hw/usb/hcd-ehci.h"
|
||||
#include "hw/ppc/fdt.h"
|
||||
|
||||
|
@ -1,6 +1,8 @@
|
||||
#ifndef PM_SMBUS_H
|
||||
#define PM_SMBUS_H
|
||||
|
||||
#include "hw/i2c/smbus_master.h"
|
||||
|
||||
#define PM_SMBUS_MAX_MSG_SIZE 32
|
||||
|
||||
typedef struct PMSMBus {
|
||||
|
35
include/hw/i2c/smbus_eeprom.h
Normal file
35
include/hw/i2c/smbus_eeprom.h
Normal file
@ -0,0 +1,35 @@
|
||||
/*
|
||||
* QEMU SMBus EEPROM API
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef HW_SMBUS_EEPROM_H
|
||||
#define HW_SMBUS_EEPROM_H
|
||||
|
||||
#include "hw/i2c/i2c.h"
|
||||
|
||||
void smbus_eeprom_init_one(I2CBus *bus, uint8_t address, uint8_t *eeprom_buf);
|
||||
void smbus_eeprom_init(I2CBus *bus, int nb_eeprom,
|
||||
const uint8_t *eeprom_spd, int size);
|
||||
|
||||
enum sdram_type { SDR = 0x4, DDR = 0x7, DDR2 = 0x8 };
|
||||
uint8_t *spd_data_generate(enum sdram_type type, ram_addr_t size, Error **errp);
|
||||
|
||||
#endif
|
55
include/hw/i2c/smbus_master.h
Normal file
55
include/hw/i2c/smbus_master.h
Normal file
@ -0,0 +1,55 @@
|
||||
/*
|
||||
* QEMU SMBus host (master) API
|
||||
*
|
||||
* Copyright (c) 2007 Arastra, Inc.
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
||||
* of this software and associated documentation files (the "Software"), to deal
|
||||
* in the Software without restriction, including without limitation the rights
|
||||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
||||
* copies of the Software, and to permit persons to whom the Software is
|
||||
* furnished to do so, subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in
|
||||
* all copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
||||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
||||
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
||||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
||||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef HW_SMBUS_MASTER_H
|
||||
#define HW_SMBUS_MASTER_H
|
||||
|
||||
#include "hw/i2c/i2c.h"
|
||||
|
||||
/* Master device commands. */
|
||||
int smbus_quick_command(I2CBus *bus, uint8_t addr, int read);
|
||||
int smbus_receive_byte(I2CBus *bus, uint8_t addr);
|
||||
int smbus_send_byte(I2CBus *bus, uint8_t addr, uint8_t data);
|
||||
int smbus_read_byte(I2CBus *bus, uint8_t addr, uint8_t command);
|
||||
int smbus_write_byte(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t data);
|
||||
int smbus_read_word(I2CBus *bus, uint8_t addr, uint8_t command);
|
||||
int smbus_write_word(I2CBus *bus, uint8_t addr, uint8_t command, uint16_t data);
|
||||
|
||||
/*
|
||||
* Do a block transfer from an I2C device. If recv_len is set, then the
|
||||
* first received byte is a length field and is used to know how much data
|
||||
* to receive. Otherwise receive "len" bytes. If send_cmd is set, send
|
||||
* the command byte first before receiving the data.
|
||||
*/
|
||||
int smbus_read_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data,
|
||||
int len, bool recv_len, bool send_cmd);
|
||||
|
||||
/*
|
||||
* Do a block transfer to an I2C device. If send_len is set, send the
|
||||
* "len" value before the data.
|
||||
*/
|
||||
int smbus_write_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data,
|
||||
int len, bool send_len);
|
||||
|
||||
#endif
|
@ -1,8 +1,5 @@
|
||||
#ifndef QEMU_SMBUS_H
|
||||
#define QEMU_SMBUS_H
|
||||
|
||||
/*
|
||||
* QEMU SMBus API
|
||||
* QEMU SMBus device (slave) API
|
||||
*
|
||||
* Copyright (c) 2007 Arastra, Inc.
|
||||
*
|
||||
@ -25,6 +22,9 @@
|
||||
* THE SOFTWARE.
|
||||
*/
|
||||
|
||||
#ifndef HW_SMBUS_SLAVE_H
|
||||
#define HW_SMBUS_SLAVE_H
|
||||
|
||||
#include "hw/i2c/i2c.h"
|
||||
|
||||
#define TYPE_SMBUS_DEVICE "smbus-device"
|
||||
@ -66,36 +66,4 @@ struct SMBusDevice {
|
||||
uint8_t command;
|
||||
};
|
||||
|
||||
/* Master device commands. */
|
||||
int smbus_quick_command(I2CBus *bus, uint8_t addr, int read);
|
||||
int smbus_receive_byte(I2CBus *bus, uint8_t addr);
|
||||
int smbus_send_byte(I2CBus *bus, uint8_t addr, uint8_t data);
|
||||
int smbus_read_byte(I2CBus *bus, uint8_t addr, uint8_t command);
|
||||
int smbus_write_byte(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t data);
|
||||
int smbus_read_word(I2CBus *bus, uint8_t addr, uint8_t command);
|
||||
int smbus_write_word(I2CBus *bus, uint8_t addr, uint8_t command, uint16_t data);
|
||||
|
||||
/*
|
||||
* Do a block transfer from an I2C device. If recv_len is set, then the
|
||||
* first received byte is a length field and is used to know how much data
|
||||
* to receive. Otherwise receive "len" bytes. If send_cmd is set, send
|
||||
* the command byte first before receiving the data.
|
||||
*/
|
||||
int smbus_read_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data,
|
||||
int len, bool recv_len, bool send_cmd);
|
||||
|
||||
/*
|
||||
* Do a block transfer to an I2C device. If send_len is set, send the
|
||||
* "len" value before the data.
|
||||
*/
|
||||
int smbus_write_block(I2CBus *bus, uint8_t addr, uint8_t command, uint8_t *data,
|
||||
int len, bool send_len);
|
||||
|
||||
void smbus_eeprom_init_one(I2CBus *smbus, uint8_t address, uint8_t *eeprom_buf);
|
||||
void smbus_eeprom_init(I2CBus *smbus, int nb_eeprom,
|
||||
const uint8_t *eeprom_spd, int size);
|
||||
|
||||
enum sdram_type { SDR = 0x4, DDR = 0x7, DDR2 = 0x8 };
|
||||
uint8_t *spd_data_generate(enum sdram_type type, ram_addr_t size, Error **errp);
|
||||
|
||||
#endif
|
Loading…
Reference in New Issue
Block a user