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CR8 support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1237 c046a42c-6fe2-441c-8c8c-71466251a162
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parent
0523c6b7c5
commit
9230e66e5c
12
hw/apic.c
12
hw/apic.c
@ -100,6 +100,18 @@ uint64_t cpu_get_apic_base(CPUState *env)
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return s->apicbase;
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}
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void cpu_set_apic_tpr(CPUX86State *env, uint8_t val)
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{
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APICState *s = env->apic_state;
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s->tpr = (val & 0x0f) << 4;
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}
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uint8_t cpu_get_apic_tpr(CPUX86State *env)
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{
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APICState *s = env->apic_state;
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return s->tpr >> 4;
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}
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/* return -1 if no bit is set */
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static int get_highest_priority_int(uint32_t *tab)
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{
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@ -509,15 +509,6 @@ typedef struct CPUX86State {
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void *opaque;
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} CPUX86State;
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#ifndef IN_OP_I386
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void cpu_x86_outb(CPUX86State *env, int addr, int val);
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void cpu_x86_outw(CPUX86State *env, int addr, int val);
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void cpu_x86_outl(CPUX86State *env, int addr, int val);
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int cpu_x86_inb(CPUX86State *env, int addr);
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int cpu_x86_inw(CPUX86State *env, int addr);
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int cpu_x86_inl(CPUX86State *env, int addr);
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#endif
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CPUX86State *cpu_x86_init(void);
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int cpu_x86_exec(CPUX86State *s);
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void cpu_x86_close(CPUX86State *s);
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@ -615,6 +606,10 @@ uint64_t cpu_get_tsc(CPUX86State *env);
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void cpu_set_apic_base(CPUX86State *env, uint64_t val);
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uint64_t cpu_get_apic_base(CPUX86State *env);
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void cpu_set_apic_tpr(CPUX86State *env, uint8_t val);
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#ifndef NO_CPU_IO_DEFS
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uint8_t cpu_get_apic_tpr(CPUX86State *env);
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#endif
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/* will be suppressed */
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void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
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@ -5631,17 +5631,20 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
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case 2:
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case 3:
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case 4:
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case 8:
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if (b & 2) {
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gen_op_mov_TN_reg[ot][0][rm]();
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gen_op_movl_crN_T0(reg);
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gen_jmp_im(s->pc - s->cs_base);
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gen_eob(s);
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} else {
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gen_op_movtl_T0_env(offsetof(CPUX86State,cr[reg]));
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if (reg == 8)
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gen_op_movtl_T0_cr8();
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else
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gen_op_movtl_T0_env(offsetof(CPUX86State,cr[reg]));
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gen_op_mov_reg_T0[ot][rm]();
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}
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break;
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/* XXX: add CR8 for x86_64 */
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default:
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goto illegal_op;
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}
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