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intel_iommu: fix bug to read DMAR_RTADDR_REG

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Should directly read DMAR_RTADDR_REG but not using 's->root'.
Because 's->root' is modified in 'vtd_root_table_setup()' so
that the first 12 bits are omitted. This causes the guest
iommu debugfs cannot show pasid tables.

Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
Message-Id: <20191205095439.29114-1-yi.y.sun@linux.intel.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Yi Sun 2019-12-05 17:54:39 +08:00 committed by Michael S. Tsirkin
parent 087ed8a582
commit 8fdee7118d
1 changed files with 3 additions and 4 deletions
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7
hw/i386/intel_iommu.c
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@ -2610,16 +2610,15 @@ static uint64_t vtd_mem_read(void *opaque, hwaddr addr, unsigned size)
switch (addr) { switch (addr) {
/* Root Table Address Register, 64-bit */ /* Root Table Address Register, 64-bit */
case DMAR_RTADDR_REG: case DMAR_RTADDR_REG:
val = vtd_get_quad_raw(s, DMAR_RTADDR_REG);
if (size == 4) { if (size == 4) {
val = s->root & ((1ULL << 32) - 1); val = val & ((1ULL << 32) - 1);
} else {
val = s->root;
} }
break; break;
case DMAR_RTADDR_REG_HI: case DMAR_RTADDR_REG_HI:
assert(size == 4); assert(size == 4);
val = s->root >> 32; val = vtd_get_quad_raw(s, DMAR_RTADDR_REG) >> 32;
break; break;
/* Invalidation Queue Address Register, 64-bit */ /* Invalidation Queue Address Register, 64-bit */