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target-sh4: fix fpu disabled/illegal exception

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Illegal instructions in a slot delay should generate a slot illegal
instruction exception instead of an illegal instruction exception.

The current PC should be saved before generating such an exception,
but should not be corrected if in a delay slot, given it's already
done in the exception handler do_interrupt().

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Aurelien Jarno 2011-01-11 16:13:34 +01:00
parent 05bf441eb6
commit 86865c5ff1
1 changed files with 18 additions and 10 deletions
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28
target-sh4/translate.c
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@ -469,27 +469,30 @@ static inline void gen_store_fpr64 (TCGv_i64 t, int reg)
#define CHECK_NOT_DELAY_SLOT \
if (ctx->flags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL)) \
{ \
tcg_gen_movi_i32(cpu_pc, ctx->pc-2); \
tcg_gen_movi_i32(cpu_pc, ctx->pc); \
gen_helper_raise_slot_illegal_instruction(); \
ctx->bstate = BS_EXCP; \
return; \
}
#define CHECK_PRIVILEGED \
if (IS_USER(ctx)) { \
tcg_gen_movi_i32(cpu_pc, ctx->pc); \
gen_helper_raise_illegal_instruction(); \
ctx->bstate = BS_EXCP; \
return; \
#define CHECK_PRIVILEGED \
if (IS_USER(ctx)) { \
tcg_gen_movi_i32(cpu_pc, ctx->pc); \
if (ctx->flags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL)) { \
gen_helper_raise_slot_illegal_instruction(); \
} else { \
gen_helper_raise_illegal_instruction(); \
} \
ctx->bstate = BS_EXCP; \
return; \
}
#define CHECK_FPU_ENABLED \
if (ctx->flags & SR_FD) { \
tcg_gen_movi_i32(cpu_pc, ctx->pc); \
if (ctx->flags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL)) { \
tcg_gen_movi_i32(cpu_pc, ctx->pc-2); \
gen_helper_raise_slot_fpu_disable(); \
} else { \
tcg_gen_movi_i32(cpu_pc, ctx->pc); \
gen_helper_raise_fpu_disable(); \
} \
ctx->bstate = BS_EXCP; \
@ -1860,7 +1863,12 @@ static void _decode_opc(DisasContext * ctx)
ctx->opcode, ctx->pc);
fflush(stderr);
#endif
gen_helper_raise_illegal_instruction();
tcg_gen_movi_i32(cpu_pc, ctx->pc);
if (ctx->flags & (DELAY_SLOT | DELAY_SLOT_CONDITIONAL)) {
gen_helper_raise_slot_illegal_instruction();
} else {
gen_helper_raise_illegal_instruction();
}
ctx->bstate = BS_EXCP;
}