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libqos/ahci: Add ahci_port_check_error helper
ahci_port_check_error checks a given port's error registers and asserts that everything from the port-level view is still OK. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 1423158090-25580-6-git-send-email-jsnow@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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@ -747,6 +747,7 @@ static void ahci_test_identify(AHCIQState *ahci)
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while (BITSET(ahci_px_rreg(ahci, i, AHCI_PX_TFD), AHCI_PX_TFD_STS_BSY)) {
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usleep(50);
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}
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ahci_port_check_error(ahci, i);
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/* Check for expected interrupts */
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reg = ahci_px_rreg(ahci, i, AHCI_PX_IS);
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@ -760,13 +761,6 @@ static void ahci_test_identify(AHCIQState *ahci)
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AHCI_PX_IS_DHRS | AHCI_PX_IS_PSS | AHCI_PX_IS_DPS);
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g_assert_cmphex(ahci_px_rreg(ahci, i, AHCI_PX_IS), ==, 0);
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/* Check for errors. */
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reg = ahci_px_rreg(ahci, i, AHCI_PX_SERR);
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g_assert_cmphex(reg, ==, 0);
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reg = ahci_px_rreg(ahci, i, AHCI_PX_TFD);
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ASSERT_BIT_CLEAR(reg, AHCI_PX_TFD_STS_ERR);
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ASSERT_BIT_CLEAR(reg, AHCI_PX_TFD_ERR);
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/* Investigate the CMD, assert that we read 512 bytes */
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ahci_get_command_header(ahci, i, cx, &cmd);
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g_assert_cmphex(512, ==, cmd.prdbc);
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@ -311,6 +311,28 @@ void ahci_port_clear(AHCIQState *ahci, uint8_t port)
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qmemset(ahci->port[port].fb, 0x00, 0x100);
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}
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/**
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* Check a port for errors.
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*/
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void ahci_port_check_error(AHCIQState *ahci, uint8_t port)
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{
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uint32_t reg;
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/* The upper 9 bits of the IS register all indicate errors. */
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reg = ahci_px_rreg(ahci, port, AHCI_PX_IS);
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reg >>= 23;
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g_assert_cmphex(reg, ==, 0);
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/* The Sata Error Register should be empty. */
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reg = ahci_px_rreg(ahci, port, AHCI_PX_SERR);
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g_assert_cmphex(reg, ==, 0);
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/* The TFD also has two error sections. */
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reg = ahci_px_rreg(ahci, port, AHCI_PX_TFD);
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ASSERT_BIT_CLEAR(reg, AHCI_PX_TFD_STS_ERR);
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ASSERT_BIT_CLEAR(reg, AHCI_PX_TFD_ERR);
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}
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/* Get the command in #slot of port #port. */
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void ahci_get_command_header(AHCIQState *ahci, uint8_t port,
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uint8_t slot, AHCICommandHeader *cmd)
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@ -433,6 +433,7 @@ void start_ahci_device(AHCIQState *ahci);
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void ahci_hba_enable(AHCIQState *ahci);
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unsigned ahci_port_select(AHCIQState *ahci);
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void ahci_port_clear(AHCIQState *ahci, uint8_t port);
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void ahci_port_check_error(AHCIQState *ahci, uint8_t port);
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void ahci_get_command_header(AHCIQState *ahci, uint8_t port,
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uint8_t slot, AHCICommandHeader *cmd);
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void ahci_set_command_header(AHCIQState *ahci, uint8_t port,
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