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x86 and machine queue, 2019-10-23
Features: * Denverton CPU model (Tao Xu) Cleanups: * Eliminate remaining places that abuse memory_region_allocate_system_memory() (Igor Mammedov) -----BEGIN PGP SIGNATURE----- iQJIBAABCAAyFiEEWjIv1avE09usz9GqKAeTb5hNxaYFAl2xEE4UHGVoYWJrb3N0 QHJlZGhhdC5jb20ACgkQKAeTb5hNxaai7A/+OxL6gyCWUz8TbyHnIyoCoynuwjmf UXIX2cOlmu6DwjWXW452cWujA/sJ+3EFDvzVhxtl1h/9n+homt2DKLdWi/b13Q7U SnxTIq6L7EdlVxWnDO+o4mO9eXvb4KmGjNCsDKaPPBRtlMul0b10icIkeParMD1X sZPAaG3cYX59L/p9jqg5B3G2usF8a3ezp/ik+9yrhxbLDNyCNhI00Gafpe5m7sHs wwMAv8LDcohAnLEW86vfB5erKVJsnMb4Sg78xAAdAgVxXPXb74xxw5yRV4adcGCe sE7NJfNHjQUDS1cKn7DOJvZslsyiFLvYtGB1J5IRt+iuPNiqy1Tfhy9GOlwuWItU LarEITudyIpxP3D3GThAQjEvjPyK3sXblV904PkUFxLVYkmPrPC4MbtQdp5MBRkV PIsYGs83RpDMGj3r1OCpOvBiulNEsxicaKzspcf/BeZL8DsmXwnhPUwBi0Sr+Sbh PJRp8jLFE+qU1PPCueiwnMnN5PgfjRAhUD05LZ6OKdgVMepzLp6ZgHDot7gjEtTj K0yaPVEIl9XywB/z/RKAVG0yZI1NVfwdVzyKL7pz5TmqFtnIDxrNyBZ8g/ZVw/i8 bhNaCu7sD/XvmneZLHzGQ8lA4LqVSeKYuUw/YrSDvE+Qu6XEbDs9preu50PhLdct K6r1Vr0VweK3h0g= =vIls -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging x86 and machine queue, 2019-10-23 Features: * Denverton CPU model (Tao Xu) Cleanups: * Eliminate remaining places that abuse memory_region_allocate_system_memory() (Igor Mammedov) # gpg: Signature made Thu 24 Oct 2019 03:45:34 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/machine-next-pull-request: hppa: drop usage of memory_region_allocate_system_memory() for ROM ppc: rs6000_mc: drop usage of memory_region_allocate_system_memory() sparc64: use memory_region_allocate_system_memory() only for '-m' specified RAM target/i386: Introduce Denverton CPU model Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
commit
81c1f71eeb
@ -161,9 +161,8 @@ static void machine_hppa_init(MachineState *machine)
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g_free(firmware_filename);
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rom_region = g_new(MemoryRegion, 1);
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memory_region_allocate_system_memory(rom_region, OBJECT(machine),
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"firmware",
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(FIRMWARE_END - FIRMWARE_START));
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memory_region_init_ram(rom_region, NULL, "firmware",
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(FIRMWARE_END - FIRMWARE_START), &error_fatal);
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memory_region_add_subregion(addr_space, FIRMWARE_START, rom_region);
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/* Load kernel */
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@ -144,6 +144,7 @@ static void rs6000mc_realize(DeviceState *dev, Error **errp)
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RS6000MCState *s = RS6000MC_DEVICE(dev);
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int socket = 0;
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unsigned int ram_size = s->ram_size / MiB;
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Error *local_err = NULL;
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while (socket < 6) {
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if (ram_size >= 64) {
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@ -165,19 +166,21 @@ static void rs6000mc_realize(DeviceState *dev, Error **errp)
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if (s->simm_size[socket]) {
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char name[] = "simm.?";
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name[5] = socket + '0';
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memory_region_allocate_system_memory(&s->simm[socket], OBJECT(dev),
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name,
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s->simm_size[socket] * MiB);
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memory_region_init_ram(&s->simm[socket], OBJECT(dev), name,
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s->simm_size[socket] * MiB, &local_err);
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if (local_err) {
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goto out;
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}
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memory_region_add_subregion_overlap(get_system_memory(), 0,
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&s->simm[socket], socket);
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}
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}
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if (ram_size) {
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/* unable to push all requested RAM in SIMMs */
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error_setg(errp, "RAM size incompatible with this board. "
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error_setg(&local_err, "RAM size incompatible with this board. "
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"Try again with something else, like %" PRId64 " MB",
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s->ram_size / MiB - ram_size);
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return;
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goto out;
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}
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if (s->autoconfigure) {
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@ -193,6 +196,8 @@ static void rs6000mc_realize(DeviceState *dev, Error **errp)
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isa_register_portio_list(ISA_DEVICE(dev), &s->portio, 0x0,
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rs6000mc_port_list, s, "rs6000mc");
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out:
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error_propagate(errp, local_err);
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}
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static const VMStateDescription vmstate_rs6000mc = {
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@ -36,6 +36,7 @@
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#include "qemu/error-report.h"
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#include "sysemu/qtest.h"
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#include "sysemu/sysemu.h"
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#include "qapi/error.h"
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typedef struct NiagaraBoardState {
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MemoryRegion hv_ram;
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@ -106,8 +107,8 @@ static void niagara_init(MachineState *machine)
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/* init CPUs */
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sparc64_cpu_devinit(machine->cpu_type, NIAGARA_PROM_BASE);
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/* set up devices */
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memory_region_allocate_system_memory(&s->hv_ram, NULL, "sun4v-hv.ram",
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NIAGARA_HV_RAM_SIZE);
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memory_region_init_ram(&s->hv_ram, NULL, "sun4v-hv.ram",
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NIAGARA_HV_RAM_SIZE, &error_fatal);
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memory_region_add_subregion(sysmem, NIAGARA_HV_RAM_BASE, &s->hv_ram);
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memory_region_allocate_system_memory(&s->partition_ram, NULL,
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@ -116,17 +117,17 @@ static void niagara_init(MachineState *machine)
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memory_region_add_subregion(sysmem, NIAGARA_PARTITION_RAM_BASE,
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&s->partition_ram);
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memory_region_allocate_system_memory(&s->nvram, NULL,
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"sun4v.nvram", NIAGARA_NVRAM_SIZE);
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memory_region_init_ram(&s->nvram, NULL, "sun4v.nvram", NIAGARA_NVRAM_SIZE,
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&error_fatal);
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memory_region_add_subregion(sysmem, NIAGARA_NVRAM_BASE, &s->nvram);
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memory_region_allocate_system_memory(&s->md_rom, NULL,
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"sun4v-md.rom", NIAGARA_MD_ROM_SIZE);
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memory_region_init_ram(&s->md_rom, NULL, "sun4v-md.rom",
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NIAGARA_MD_ROM_SIZE, &error_fatal);
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memory_region_add_subregion(sysmem, NIAGARA_MD_ROM_BASE, &s->md_rom);
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memory_region_allocate_system_memory(&s->hv_rom, NULL,
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"sun4v-hv.rom", NIAGARA_HV_ROM_SIZE);
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memory_region_init_ram(&s->hv_rom, NULL, "sun4v-hv.rom",
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NIAGARA_HV_ROM_SIZE, &error_fatal);
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memory_region_add_subregion(sysmem, NIAGARA_HV_ROM_BASE, &s->hv_rom);
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memory_region_allocate_system_memory(&s->prom, NULL,
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"sun4v.prom", PROM_SIZE_MAX);
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memory_region_init_ram(&s->prom, NULL, "sun4v.prom", PROM_SIZE_MAX,
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&error_fatal);
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memory_region_add_subregion(sysmem, NIAGARA_PROM_BASE, &s->prom);
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add_rom_or_fail("nvram1", NIAGARA_NVRAM_BASE);
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@ -143,8 +144,8 @@ static void niagara_init(MachineState *machine)
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BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
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int size = blk_getlength(blk);
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if (size > 0) {
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memory_region_allocate_system_memory(&s->vdisk_ram, NULL,
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"sun4v_vdisk.ram", size);
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memory_region_init_ram(&s->vdisk_ram, NULL, "sun4v_vdisk.ram", size,
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&error_fatal);
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memory_region_add_subregion(get_system_memory(),
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NIAGARA_VDISK_BASE, &s->vdisk_ram);
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dinfo->is_default = 1;
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@ -2724,6 +2724,53 @@ static X86CPUDefinition builtin_x86_defs[] = {
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.xlevel = 0x80000008,
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.model_id = "Intel Xeon Processor (Icelake)",
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},
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{
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.name = "Denverton",
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.level = 21,
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.vendor = CPUID_VENDOR_INTEL,
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.family = 6,
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.model = 95,
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.stepping = 1,
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.features[FEAT_1_EDX] =
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CPUID_FP87 | CPUID_VME | CPUID_DE | CPUID_PSE | CPUID_TSC |
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CPUID_MSR | CPUID_PAE | CPUID_MCE | CPUID_CX8 | CPUID_APIC |
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CPUID_SEP | CPUID_MTRR | CPUID_PGE | CPUID_MCA | CPUID_CMOV |
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CPUID_PAT | CPUID_PSE36 | CPUID_CLFLUSH | CPUID_MMX | CPUID_FXSR |
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CPUID_SSE | CPUID_SSE2,
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.features[FEAT_1_ECX] =
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CPUID_EXT_SSE3 | CPUID_EXT_PCLMULQDQ | CPUID_EXT_MONITOR |
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CPUID_EXT_SSSE3 | CPUID_EXT_CX16 | CPUID_EXT_SSE41 |
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CPUID_EXT_SSE42 | CPUID_EXT_X2APIC | CPUID_EXT_MOVBE |
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CPUID_EXT_POPCNT | CPUID_EXT_TSC_DEADLINE_TIMER |
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CPUID_EXT_AES | CPUID_EXT_XSAVE | CPUID_EXT_RDRAND,
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.features[FEAT_8000_0001_EDX] =
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CPUID_EXT2_SYSCALL | CPUID_EXT2_NX | CPUID_EXT2_PDPE1GB |
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CPUID_EXT2_RDTSCP | CPUID_EXT2_LM,
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.features[FEAT_8000_0001_ECX] =
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CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH,
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.features[FEAT_7_0_EBX] =
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CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_ERMS |
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CPUID_7_0_EBX_MPX | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_SMAP |
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CPUID_7_0_EBX_CLFLUSHOPT | CPUID_7_0_EBX_SHA_NI,
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.features[FEAT_7_0_EDX] =
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CPUID_7_0_EDX_SPEC_CTRL | CPUID_7_0_EDX_ARCH_CAPABILITIES |
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CPUID_7_0_EDX_SPEC_CTRL_SSBD,
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/*
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* Missing: XSAVES (not supported by some Linux versions,
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* including v4.1 to v4.12).
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* KVM doesn't yet expose any XSAVES state save component,
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* and the only one defined in Skylake (processor tracing)
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* probably will block migration anyway.
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*/
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.features[FEAT_XSAVE] =
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CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC | CPUID_XSAVE_XGETBV1,
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.features[FEAT_6_EAX] =
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CPUID_6_EAX_ARAT,
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.features[FEAT_ARCH_CAPABILITIES] =
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MSR_ARCH_CAP_RDCL_NO | MSR_ARCH_CAP_SKIP_L1DFL_VMENTRY,
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.xlevel = 0x80000008,
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.model_id = "Intel Atom Processor (Denverton)",
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},
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{
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.name = "Snowridge",
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.level = 27,
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