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target/mips: msa: Split helpers for SUBS_U.<B|H|W|D>

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Achieves clearer code and slightly better performance.

Reviewed-by: Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>
Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com>
Message-Id: <20200613152133.8964-11-aleksandar.qemu.devel@gmail.com>
This commit is contained in:
Aleksandar Markovic 2020-06-13 17:21:29 +02:00
parent 534e400141
commit 81b53858fe
3 changed files with 93 additions and 10 deletions
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6
target/mips/helper.h
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@ -983,6 +983,11 @@ DEF_HELPER_4(msa_subs_s_h, void, env, i32, i32, i32)
DEF_HELPER_4(msa_subs_s_w, void, env, i32, i32, i32)
DEF_HELPER_4(msa_subs_s_d, void, env, i32, i32, i32)
DEF_HELPER_4(msa_subs_u_b, void, env, i32, i32, i32)
DEF_HELPER_4(msa_subs_u_h, void, env, i32, i32, i32)
DEF_HELPER_4(msa_subs_u_w, void, env, i32, i32, i32)
DEF_HELPER_4(msa_subs_u_d, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ilvev_b, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ilvev_h, void, env, i32, i32, i32)
DEF_HELPER_4(msa_ilvev_w, void, env, i32, i32, i32)
@ -1079,7 +1084,6 @@ DEF_HELPER_5(msa_srlri_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_binsl_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_binsr_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_subv_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_subs_u_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_subsus_u_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_subsuu_s_df, void, env, i32, i32, i32, i32)
DEF_HELPER_5(msa_mulv_df, void, env, i32, i32, i32, i32)

82
target/mips/msa_helper.c
View File

@ -3728,6 +3728,80 @@ void helper_msa_subs_s_d(CPUMIPSState *env,
}
static inline int64_t msa_subs_u_df(uint32_t df, int64_t arg1, int64_t arg2)
{
uint64_t u_arg1 = UNSIGNED(arg1, df);
uint64_t u_arg2 = UNSIGNED(arg2, df);
return (u_arg1 > u_arg2) ? u_arg1 - u_arg2 : 0;
}
void helper_msa_subs_u_b(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
pwd->b[0] = msa_subs_u_df(DF_BYTE, pws->b[0], pwt->b[0]);
pwd->b[1] = msa_subs_u_df(DF_BYTE, pws->b[1], pwt->b[1]);
pwd->b[2] = msa_subs_u_df(DF_BYTE, pws->b[2], pwt->b[2]);
pwd->b[3] = msa_subs_u_df(DF_BYTE, pws->b[3], pwt->b[3]);
pwd->b[4] = msa_subs_u_df(DF_BYTE, pws->b[4], pwt->b[4]);
pwd->b[5] = msa_subs_u_df(DF_BYTE, pws->b[5], pwt->b[5]);
pwd->b[6] = msa_subs_u_df(DF_BYTE, pws->b[6], pwt->b[6]);
pwd->b[7] = msa_subs_u_df(DF_BYTE, pws->b[7], pwt->b[7]);
pwd->b[8] = msa_subs_u_df(DF_BYTE, pws->b[8], pwt->b[8]);
pwd->b[9] = msa_subs_u_df(DF_BYTE, pws->b[9], pwt->b[9]);
pwd->b[10] = msa_subs_u_df(DF_BYTE, pws->b[10], pwt->b[10]);
pwd->b[11] = msa_subs_u_df(DF_BYTE, pws->b[11], pwt->b[11]);
pwd->b[12] = msa_subs_u_df(DF_BYTE, pws->b[12], pwt->b[12]);
pwd->b[13] = msa_subs_u_df(DF_BYTE, pws->b[13], pwt->b[13]);
pwd->b[14] = msa_subs_u_df(DF_BYTE, pws->b[14], pwt->b[14]);
pwd->b[15] = msa_subs_u_df(DF_BYTE, pws->b[15], pwt->b[15]);
}
void helper_msa_subs_u_h(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
pwd->h[0] = msa_subs_u_df(DF_HALF, pws->h[0], pwt->h[0]);
pwd->h[1] = msa_subs_u_df(DF_HALF, pws->h[1], pwt->h[1]);
pwd->h[2] = msa_subs_u_df(DF_HALF, pws->h[2], pwt->h[2]);
pwd->h[3] = msa_subs_u_df(DF_HALF, pws->h[3], pwt->h[3]);
pwd->h[4] = msa_subs_u_df(DF_HALF, pws->h[4], pwt->h[4]);
pwd->h[5] = msa_subs_u_df(DF_HALF, pws->h[5], pwt->h[5]);
pwd->h[6] = msa_subs_u_df(DF_HALF, pws->h[6], pwt->h[6]);
pwd->h[7] = msa_subs_u_df(DF_HALF, pws->h[7], pwt->h[7]);
}
void helper_msa_subs_u_w(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
pwd->w[0] = msa_subs_u_df(DF_WORD, pws->w[0], pwt->w[0]);
pwd->w[1] = msa_subs_u_df(DF_WORD, pws->w[1], pwt->w[1]);
pwd->w[2] = msa_subs_u_df(DF_WORD, pws->w[2], pwt->w[2]);
pwd->w[3] = msa_subs_u_df(DF_WORD, pws->w[3], pwt->w[3]);
}
void helper_msa_subs_u_d(CPUMIPSState *env,
uint32_t wd, uint32_t ws, uint32_t wt)
{
wr_t *pwd = &(env->active_fpu.fpr[wd].wr);
wr_t *pws = &(env->active_fpu.fpr[ws].wr);
wr_t *pwt = &(env->active_fpu.fpr[wt].wr);
pwd->d[0] = msa_subs_u_df(DF_DOUBLE, pws->d[0], pwt->d[0]);
pwd->d[1] = msa_subs_u_df(DF_DOUBLE, pws->d[1], pwt->d[1]);
}
/*
* Interleave
* ----------
@ -5138,13 +5212,6 @@ MSA_TEROP_IMMU_DF(binsli, binsl)
MSA_TEROP_IMMU_DF(binsri, binsr)
#undef MSA_TEROP_IMMU_DF
static inline int64_t msa_subs_u_df(uint32_t df, int64_t arg1, int64_t arg2)
{
uint64_t u_arg1 = UNSIGNED(arg1, df);
uint64_t u_arg2 = UNSIGNED(arg2, df);
return (u_arg1 > u_arg2) ? u_arg1 - u_arg2 : 0;
}
static inline int64_t msa_subsus_u_df(uint32_t df, int64_t arg1, int64_t arg2)
{
uint64_t u_arg1 = UNSIGNED(arg1, df);
@ -5302,7 +5369,6 @@ void helper_msa_ ## func ## _df(CPUMIPSState *env, uint32_t df, \
}
MSA_BINOP_DF(subv)
MSA_BINOP_DF(subs_u)
MSA_BINOP_DF(subsus_u)
MSA_BINOP_DF(subsuu_s)
MSA_BINOP_DF(mulv)

15
target/mips/translate.c
View File

@ -29327,7 +29327,20 @@ static void gen_msa_3r(CPUMIPSState *env, DisasContext *ctx)
gen_helper_msa_subv_df(cpu_env, tdf, twd, tws, twt);
break;
case OPC_SUBS_U_df:
gen_helper_msa_subs_u_df(cpu_env, tdf, twd, tws, twt);
switch (df) {
case DF_BYTE:
gen_helper_msa_subs_u_b(cpu_env, twd, tws, twt);
break;
case DF_HALF:
gen_helper_msa_subs_u_h(cpu_env, twd, tws, twt);
break;
case DF_WORD:
gen_helper_msa_subs_u_w(cpu_env, twd, tws, twt);
break;
case DF_DOUBLE:
gen_helper_msa_subs_u_d(cpu_env, twd, tws, twt);
break;
}
break;
case OPC_SPLAT_df:
gen_helper_msa_splat_df(cpu_env, tdf, twd, tws, twt);