mirror of
https://github.com/qemu/qemu.git
synced 2024-11-24 03:13:44 +08:00
target/hppa: Enable MTTCG
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
parent
95412a6128
commit
7b93dab51e
1
configure
vendored
1
configure
vendored
@ -6555,6 +6555,7 @@ case "$target_name" in
|
||||
cris)
|
||||
;;
|
||||
hppa)
|
||||
mttcg="yes"
|
||||
;;
|
||||
lm32)
|
||||
;;
|
||||
|
@ -42,6 +42,12 @@
|
||||
#define TARGET_PHYS_ADDR_SPACE_BITS 32
|
||||
#endif
|
||||
|
||||
/* PA-RISC 1.x processors have a strong memory model. */
|
||||
/* ??? While we do not yet implement PA-RISC 2.0, those processors have
|
||||
a weak memory model, but with TLB bits that force ordering on a per-page
|
||||
basis. It's probably easier to fall back to a strong memory model. */
|
||||
#define TCG_GUEST_DEFAULT_MO TCG_MO_ALL
|
||||
|
||||
#define CPUArchState struct CPUHPPAState
|
||||
|
||||
#include "exec/cpu-defs.h"
|
||||
|
Loading…
Reference in New Issue
Block a user