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exec: RCUify AddressSpaceDispatch
Note that even after this patch, most callers of address_space_* functions must still be under the big QEMU lock, otherwise the memory region returned by address_space_translate can disappear as soon as address_space_translate returns. This will be fixed in the next part of this series. Reviewed-by: Fam Zheng <famz@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
This commit is contained in:
parent
9d82b5a792
commit
79e2b9aecc
25
cpu-exec.c
25
cpu-exec.c
@ -26,6 +26,7 @@
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#include "qemu/timer.h"
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#include "exec/address-spaces.h"
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#include "exec/memory-internal.h"
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#include "qemu/rcu.h"
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/* -icount align implementation. */
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@ -146,8 +147,27 @@ void cpu_resume_from_signal(CPUState *cpu, void *puc)
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void cpu_reload_memory_map(CPUState *cpu)
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{
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AddressSpaceDispatch *d;
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if (qemu_in_vcpu_thread()) {
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/* Do not let the guest prolong the critical section as much as it
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* as it desires.
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*
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* Currently, this is prevented by the I/O thread's periodinc kicking
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* of the VCPU thread (iothread_requesting_mutex, qemu_cpu_kick_thread)
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* but this will go away once TCG's execution moves out of the global
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* mutex.
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*
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* This pair matches cpu_exec's rcu_read_lock()/rcu_read_unlock(), which
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* only protects cpu->as->dispatch. Since we reload it below, we can
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* split the critical section.
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*/
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rcu_read_unlock();
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rcu_read_lock();
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}
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/* The CPU and TLB are protected by the iothread lock. */
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AddressSpaceDispatch *d = cpu->as->dispatch;
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d = atomic_rcu_read(&cpu->as->dispatch);
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cpu->memory_dispatch = d;
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tlb_flush(cpu, 1);
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}
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@ -362,6 +382,8 @@ int cpu_exec(CPUArchState *env)
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* an instruction scheduling constraint on modern architectures. */
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smp_mb();
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rcu_read_lock();
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if (unlikely(exit_request)) {
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cpu->exit_request = 1;
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}
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@ -564,6 +586,7 @@ int cpu_exec(CPUArchState *env)
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} /* for(;;) */
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cc->cpu_exec_exit(cpu);
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rcu_read_unlock();
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/* fail safe : never use current_cpu outside cpu_exec() */
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current_cpu = NULL;
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2
cpus.c
2
cpus.c
@ -1104,7 +1104,7 @@ bool qemu_cpu_is_self(CPUState *cpu)
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return qemu_thread_is_self(cpu->thread);
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}
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static bool qemu_in_vcpu_thread(void)
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bool qemu_in_vcpu_thread(void)
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{
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return current_cpu && qemu_cpu_is_self(current_cpu);
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}
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8
cputlb.c
8
cputlb.c
@ -243,8 +243,12 @@ static void tlb_add_large_page(CPUArchState *env, target_ulong vaddr,
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}
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/* Add a new TLB entry. At most one entry for a given virtual address
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is permitted. Only a single TARGET_PAGE_SIZE region is mapped, the
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supplied size is only used by tlb_flush_page. */
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* is permitted. Only a single TARGET_PAGE_SIZE region is mapped, the
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* supplied size is only used by tlb_flush_page.
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*
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* Called from TCG-generated code, which is under an RCU read-side
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* critical section.
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*/
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void tlb_set_page(CPUState *cpu, target_ulong vaddr,
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hwaddr paddr, int prot,
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int mmu_idx, target_ulong size)
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34
exec.c
34
exec.c
@ -115,6 +115,8 @@ struct PhysPageEntry {
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typedef PhysPageEntry Node[P_L2_SIZE];
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typedef struct PhysPageMap {
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struct rcu_head rcu;
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unsigned sections_nb;
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unsigned sections_nb_alloc;
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unsigned nodes_nb;
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@ -124,6 +126,8 @@ typedef struct PhysPageMap {
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} PhysPageMap;
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struct AddressSpaceDispatch {
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struct rcu_head rcu;
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/* This is a multi-level map on the physical address space.
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* The bottom level has pointers to MemoryRegionSections.
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*/
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@ -315,6 +319,7 @@ bool memory_region_is_unassigned(MemoryRegion *mr)
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&& mr != &io_mem_watch;
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}
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/* Called from RCU critical section */
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static MemoryRegionSection *address_space_lookup_region(AddressSpaceDispatch *d,
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hwaddr addr,
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bool resolve_subpage)
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@ -330,6 +335,7 @@ static MemoryRegionSection *address_space_lookup_region(AddressSpaceDispatch *d,
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return section;
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}
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/* Called from RCU critical section */
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static MemoryRegionSection *
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address_space_translate_internal(AddressSpaceDispatch *d, hwaddr addr, hwaddr *xlat,
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hwaddr *plen, bool resolve_subpage)
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@ -370,8 +376,10 @@ MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr,
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MemoryRegion *mr;
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hwaddr len = *plen;
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rcu_read_lock();
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for (;;) {
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section = address_space_translate_internal(as->dispatch, addr, &addr, plen, true);
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AddressSpaceDispatch *d = atomic_rcu_read(&as->dispatch);
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section = address_space_translate_internal(d, addr, &addr, plen, true);
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mr = section->mr;
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if (!mr->iommu_ops) {
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@ -397,9 +405,11 @@ MemoryRegion *address_space_translate(AddressSpace *as, hwaddr addr,
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*plen = len;
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*xlat = addr;
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rcu_read_unlock();
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return mr;
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}
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/* Called from RCU critical section */
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MemoryRegionSection *
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address_space_translate_for_iotlb(CPUState *cpu, hwaddr addr,
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hwaddr *xlat, hwaddr *plen)
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@ -852,6 +862,7 @@ static void cpu_physical_memory_set_dirty_tracking(bool enable)
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in_migration = enable;
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}
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/* Called from RCU critical section */
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hwaddr memory_region_section_get_iotlb(CPUState *cpu,
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MemoryRegionSection *section,
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target_ulong vaddr,
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@ -1964,7 +1975,8 @@ static uint16_t dummy_section(PhysPageMap *map, AddressSpace *as,
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MemoryRegion *iotlb_to_region(CPUState *cpu, hwaddr index)
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{
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MemoryRegionSection *sections = cpu->memory_dispatch->map.sections;
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AddressSpaceDispatch *d = atomic_rcu_read(&cpu->memory_dispatch);
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MemoryRegionSection *sections = d->map.sections;
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return sections[index & ~TARGET_PAGE_MASK].mr;
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}
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@ -2000,6 +2012,12 @@ static void mem_begin(MemoryListener *listener)
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as->next_dispatch = d;
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}
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static void address_space_dispatch_free(AddressSpaceDispatch *d)
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{
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phys_sections_free(&d->map);
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g_free(d);
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}
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static void mem_commit(MemoryListener *listener)
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{
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AddressSpace *as = container_of(listener, AddressSpace, dispatch_listener);
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@ -2008,11 +2026,9 @@ static void mem_commit(MemoryListener *listener)
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phys_page_compact_all(next, next->map.nodes_nb);
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as->dispatch = next;
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atomic_rcu_set(&as->dispatch, next);
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if (cur) {
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phys_sections_free(&cur->map);
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g_free(cur);
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call_rcu(cur, address_space_dispatch_free, rcu);
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}
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}
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@ -2071,8 +2087,10 @@ void address_space_destroy_dispatch(AddressSpace *as)
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{
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AddressSpaceDispatch *d = as->dispatch;
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g_free(d);
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as->dispatch = NULL;
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atomic_rcu_set(&as->dispatch, NULL);
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if (d) {
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call_rcu(d, address_space_dispatch_free, rcu);
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}
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}
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static void memory_map_init(void)
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@ -745,6 +745,9 @@ static inline bool vtd_is_interrupt_addr(hwaddr addr)
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/* Map dev to context-entry then do a paging-structures walk to do a iommu
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* translation.
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*
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* Called from RCU critical section.
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*
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* @bus_num: The bus number
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* @devfn: The devfn, which is the combined of device and function number
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* @is_write: The access is a write operation
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@ -205,6 +205,7 @@ static AddressSpace *pbm_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn)
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return &is->iommu_as;
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}
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/* Called from RCU critical section */
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static IOMMUTLBEntry pbm_translate_iommu(MemoryRegion *iommu, hwaddr addr,
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bool is_write)
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{
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@ -59,6 +59,7 @@ static sPAPRTCETable *spapr_tce_find_by_liobn(uint32_t liobn)
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return NULL;
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}
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/* Called from RCU critical section */
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static IOMMUTLBEntry spapr_tce_translate_iommu(MemoryRegion *iommu, hwaddr addr,
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bool is_write)
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{
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@ -96,6 +96,7 @@ void tb_invalidate_phys_page_range(tb_page_addr_t start, tb_page_addr_t end,
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void tb_invalidate_phys_range(tb_page_addr_t start, tb_page_addr_t end,
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int is_cpu_write_access);
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#if !defined(CONFIG_USER_ONLY)
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bool qemu_in_vcpu_thread(void);
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void cpu_reload_memory_map(CPUState *cpu);
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void tcg_cpu_address_space_init(CPUState *cpu, AddressSpace *as);
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/* cputlb.c */
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