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MAINTAINERS: Add unvalued folders in tests/tcg/ to the right sections
Some subfolders in tests/tcg/ are already listed in the MAINTAINERS file, some others aren't listed yet. Add the missing ones now to the MAINTAINERS file, too, to make sure that get_maintainers.pl reports the correct maintainer. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
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@ -245,6 +245,7 @@ M: Richard Henderson <richard.henderson@linaro.org>
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S: Maintained
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S: Maintained
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F: target/hppa/
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F: target/hppa/
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F: disas/hppa.c
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F: disas/hppa.c
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F: tests/tcg/hppa/
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LoongArch TCG CPUs
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LoongArch TCG CPUs
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M: Song Gao <gaosong@loongson.cn>
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M: Song Gao <gaosong@loongson.cn>
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@ -258,6 +259,7 @@ M: Laurent Vivier <laurent@vivier.eu>
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S: Maintained
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S: Maintained
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F: target/m68k/
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F: target/m68k/
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F: disas/m68k.c
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F: disas/m68k.c
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F: tests/tcg/m68k/
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MicroBlaze TCG CPUs
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MicroBlaze TCG CPUs
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M: Edgar E. Iglesias <edgar.iglesias@gmail.com>
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M: Edgar E. Iglesias <edgar.iglesias@gmail.com>
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@ -315,6 +317,7 @@ F: hw/ppc/trace*
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F: configs/devices/ppc*
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F: configs/devices/ppc*
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F: docs/system/ppc/embedded.rst
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F: docs/system/ppc/embedded.rst
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F: docs/system/target-ppc.rst
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F: docs/system/target-ppc.rst
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F: tests/tcg/ppc*/*
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RISC-V TCG CPUs
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RISC-V TCG CPUs
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M: Palmer Dabbelt <palmer@dabbelt.com>
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M: Palmer Dabbelt <palmer@dabbelt.com>
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@ -333,6 +336,7 @@ F: hw/intc/riscv*
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F: include/hw/riscv/
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F: include/hw/riscv/
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F: linux-user/host/riscv32/
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F: linux-user/host/riscv32/
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F: linux-user/host/riscv64/
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F: linux-user/host/riscv64/
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F: tests/tcg/riscv64/
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RISC-V XThead* extensions
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RISC-V XThead* extensions
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M: Christoph Muellner <christoph.muellner@vrull.eu>
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M: Christoph Muellner <christoph.muellner@vrull.eu>
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@ -374,6 +378,7 @@ F: target/sh4/
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F: hw/sh4/
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F: hw/sh4/
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F: disas/sh4.c
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F: disas/sh4.c
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F: include/hw/sh4/
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F: include/hw/sh4/
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F: tests/tcg/sh4/
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SPARC TCG CPUs
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SPARC TCG CPUs
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M: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
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M: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
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@ -384,6 +389,7 @@ F: hw/sparc/
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F: hw/sparc64/
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F: hw/sparc64/
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F: include/hw/sparc/sparc64.h
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F: include/hw/sparc/sparc64.h
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F: disas/sparc.c
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F: disas/sparc.c
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F: tests/tcg/sparc64/
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X86 TCG CPUs
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X86 TCG CPUs
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M: Paolo Bonzini <pbonzini@redhat.com>
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M: Paolo Bonzini <pbonzini@redhat.com>
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