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target-arm: A32: Use get_mem_index for load/stores
Avoid using IS_USER directly as the MMU-idx to simplify future changes to the MMU layout. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1400980132-25949-5-git-send-email-edgar.iglesias@gmail.com Message-id: 1400805738-11889-6-git-send-email-edgar.iglesias@gmail.com [PMM: parts relating to LDRT/STRT moved into earlier patches] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
parent
c119779543
commit
6ce2faf43c
@ -1165,18 +1165,18 @@ VFP_GEN_FIX(ulto, )
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static inline void gen_vfp_ld(DisasContext *s, int dp, TCGv_i32 addr)
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{
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if (dp) {
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gen_aa32_ld64(cpu_F0d, addr, IS_USER(s));
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gen_aa32_ld64(cpu_F0d, addr, get_mem_index(s));
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} else {
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gen_aa32_ld32u(cpu_F0s, addr, IS_USER(s));
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gen_aa32_ld32u(cpu_F0s, addr, get_mem_index(s));
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}
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}
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static inline void gen_vfp_st(DisasContext *s, int dp, TCGv_i32 addr)
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{
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if (dp) {
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gen_aa32_st64(cpu_F0d, addr, IS_USER(s));
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gen_aa32_st64(cpu_F0d, addr, get_mem_index(s));
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} else {
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gen_aa32_st32(cpu_F0s, addr, IS_USER(s));
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gen_aa32_st32(cpu_F0s, addr, get_mem_index(s));
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}
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}
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@ -1514,24 +1514,24 @@ static int disas_iwmmxt_insn(CPUARMState *env, DisasContext *s, uint32_t insn)
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if (insn & ARM_CP_RW_BIT) {
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if ((insn >> 28) == 0xf) { /* WLDRW wCx */
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tmp = tcg_temp_new_i32();
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gen_aa32_ld32u(tmp, addr, IS_USER(s));
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gen_aa32_ld32u(tmp, addr, get_mem_index(s));
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iwmmxt_store_creg(wrd, tmp);
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} else {
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i = 1;
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if (insn & (1 << 8)) {
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if (insn & (1 << 22)) { /* WLDRD */
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gen_aa32_ld64(cpu_M0, addr, IS_USER(s));
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gen_aa32_ld64(cpu_M0, addr, get_mem_index(s));
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i = 0;
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} else { /* WLDRW wRd */
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tmp = tcg_temp_new_i32();
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gen_aa32_ld32u(tmp, addr, IS_USER(s));
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gen_aa32_ld32u(tmp, addr, get_mem_index(s));
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}
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} else {
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tmp = tcg_temp_new_i32();
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if (insn & (1 << 22)) { /* WLDRH */
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gen_aa32_ld16u(tmp, addr, IS_USER(s));
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gen_aa32_ld16u(tmp, addr, get_mem_index(s));
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} else { /* WLDRB */
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gen_aa32_ld8u(tmp, addr, IS_USER(s));
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gen_aa32_ld8u(tmp, addr, get_mem_index(s));
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}
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}
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if (i) {
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@ -1543,24 +1543,24 @@ static int disas_iwmmxt_insn(CPUARMState *env, DisasContext *s, uint32_t insn)
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} else {
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if ((insn >> 28) == 0xf) { /* WSTRW wCx */
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tmp = iwmmxt_load_creg(wrd);
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gen_aa32_st32(tmp, addr, IS_USER(s));
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gen_aa32_st32(tmp, addr, get_mem_index(s));
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} else {
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gen_op_iwmmxt_movq_M0_wRn(wrd);
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tmp = tcg_temp_new_i32();
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if (insn & (1 << 8)) {
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if (insn & (1 << 22)) { /* WSTRD */
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gen_aa32_st64(cpu_M0, addr, IS_USER(s));
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gen_aa32_st64(cpu_M0, addr, get_mem_index(s));
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} else { /* WSTRW wRd */
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tcg_gen_trunc_i64_i32(tmp, cpu_M0);
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gen_aa32_st32(tmp, addr, IS_USER(s));
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gen_aa32_st32(tmp, addr, get_mem_index(s));
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}
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} else {
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if (insn & (1 << 22)) { /* WSTRH */
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tcg_gen_trunc_i64_i32(tmp, cpu_M0);
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gen_aa32_st16(tmp, addr, IS_USER(s));
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gen_aa32_st16(tmp, addr, get_mem_index(s));
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} else { /* WSTRB */
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tcg_gen_trunc_i64_i32(tmp, cpu_M0);
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gen_aa32_st8(tmp, addr, IS_USER(s));
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gen_aa32_st8(tmp, addr, get_mem_index(s));
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}
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}
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}
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@ -2625,15 +2625,15 @@ static TCGv_i32 gen_load_and_replicate(DisasContext *s, TCGv_i32 addr, int size)
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TCGv_i32 tmp = tcg_temp_new_i32();
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switch (size) {
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case 0:
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gen_aa32_ld8u(tmp, addr, IS_USER(s));
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gen_aa32_ld8u(tmp, addr, get_mem_index(s));
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gen_neon_dup_u8(tmp, 0);
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break;
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case 1:
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gen_aa32_ld16u(tmp, addr, IS_USER(s));
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gen_aa32_ld16u(tmp, addr, get_mem_index(s));
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gen_neon_dup_low16(tmp);
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break;
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case 2:
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gen_aa32_ld32u(tmp, addr, IS_USER(s));
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gen_aa32_ld32u(tmp, addr, get_mem_index(s));
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break;
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default: /* Avoid compiler warnings. */
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abort();
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@ -4304,11 +4304,11 @@ static int disas_neon_ls_insn(CPUARMState * env, DisasContext *s, uint32_t insn)
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if (size == 3) {
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tmp64 = tcg_temp_new_i64();
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if (load) {
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gen_aa32_ld64(tmp64, addr, IS_USER(s));
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gen_aa32_ld64(tmp64, addr, get_mem_index(s));
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neon_store_reg64(tmp64, rd);
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} else {
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neon_load_reg64(tmp64, rd);
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gen_aa32_st64(tmp64, addr, IS_USER(s));
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gen_aa32_st64(tmp64, addr, get_mem_index(s));
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}
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tcg_temp_free_i64(tmp64);
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tcg_gen_addi_i32(addr, addr, stride);
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@ -4317,21 +4317,21 @@ static int disas_neon_ls_insn(CPUARMState * env, DisasContext *s, uint32_t insn)
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if (size == 2) {
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if (load) {
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tmp = tcg_temp_new_i32();
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gen_aa32_ld32u(tmp, addr, IS_USER(s));
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gen_aa32_ld32u(tmp, addr, get_mem_index(s));
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neon_store_reg(rd, pass, tmp);
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} else {
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tmp = neon_load_reg(rd, pass);
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gen_aa32_st32(tmp, addr, IS_USER(s));
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gen_aa32_st32(tmp, addr, get_mem_index(s));
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tcg_temp_free_i32(tmp);
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}
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tcg_gen_addi_i32(addr, addr, stride);
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} else if (size == 1) {
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if (load) {
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tmp = tcg_temp_new_i32();
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gen_aa32_ld16u(tmp, addr, IS_USER(s));
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gen_aa32_ld16u(tmp, addr, get_mem_index(s));
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tcg_gen_addi_i32(addr, addr, stride);
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tmp2 = tcg_temp_new_i32();
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gen_aa32_ld16u(tmp2, addr, IS_USER(s));
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gen_aa32_ld16u(tmp2, addr, get_mem_index(s));
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tcg_gen_addi_i32(addr, addr, stride);
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tcg_gen_shli_i32(tmp2, tmp2, 16);
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tcg_gen_or_i32(tmp, tmp, tmp2);
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@ -4341,10 +4341,10 @@ static int disas_neon_ls_insn(CPUARMState * env, DisasContext *s, uint32_t insn)
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tmp = neon_load_reg(rd, pass);
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tmp2 = tcg_temp_new_i32();
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tcg_gen_shri_i32(tmp2, tmp, 16);
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gen_aa32_st16(tmp, addr, IS_USER(s));
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gen_aa32_st16(tmp, addr, get_mem_index(s));
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tcg_temp_free_i32(tmp);
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tcg_gen_addi_i32(addr, addr, stride);
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gen_aa32_st16(tmp2, addr, IS_USER(s));
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gen_aa32_st16(tmp2, addr, get_mem_index(s));
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tcg_temp_free_i32(tmp2);
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tcg_gen_addi_i32(addr, addr, stride);
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}
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@ -4353,7 +4353,7 @@ static int disas_neon_ls_insn(CPUARMState * env, DisasContext *s, uint32_t insn)
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TCGV_UNUSED_I32(tmp2);
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for (n = 0; n < 4; n++) {
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tmp = tcg_temp_new_i32();
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gen_aa32_ld8u(tmp, addr, IS_USER(s));
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gen_aa32_ld8u(tmp, addr, get_mem_index(s));
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tcg_gen_addi_i32(addr, addr, stride);
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if (n == 0) {
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tmp2 = tmp;
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@ -4373,7 +4373,7 @@ static int disas_neon_ls_insn(CPUARMState * env, DisasContext *s, uint32_t insn)
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} else {
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tcg_gen_shri_i32(tmp, tmp2, n * 8);
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}
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gen_aa32_st8(tmp, addr, IS_USER(s));
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gen_aa32_st8(tmp, addr, get_mem_index(s));
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tcg_temp_free_i32(tmp);
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tcg_gen_addi_i32(addr, addr, stride);
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}
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@ -4497,13 +4497,13 @@ static int disas_neon_ls_insn(CPUARMState * env, DisasContext *s, uint32_t insn)
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tmp = tcg_temp_new_i32();
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switch (size) {
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case 0:
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gen_aa32_ld8u(tmp, addr, IS_USER(s));
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gen_aa32_ld8u(tmp, addr, get_mem_index(s));
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break;
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case 1:
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gen_aa32_ld16u(tmp, addr, IS_USER(s));
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gen_aa32_ld16u(tmp, addr, get_mem_index(s));
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break;
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case 2:
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gen_aa32_ld32u(tmp, addr, IS_USER(s));
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gen_aa32_ld32u(tmp, addr, get_mem_index(s));
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break;
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default: /* Avoid compiler warnings. */
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abort();
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@ -4521,13 +4521,13 @@ static int disas_neon_ls_insn(CPUARMState * env, DisasContext *s, uint32_t insn)
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tcg_gen_shri_i32(tmp, tmp, shift);
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switch (size) {
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case 0:
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gen_aa32_st8(tmp, addr, IS_USER(s));
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gen_aa32_st8(tmp, addr, get_mem_index(s));
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break;
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case 1:
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gen_aa32_st16(tmp, addr, IS_USER(s));
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gen_aa32_st16(tmp, addr, get_mem_index(s));
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break;
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case 2:
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gen_aa32_st32(tmp, addr, IS_USER(s));
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gen_aa32_st32(tmp, addr, get_mem_index(s));
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break;
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}
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tcg_temp_free_i32(tmp);
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@ -7173,14 +7173,14 @@ static void gen_load_exclusive(DisasContext *s, int rt, int rt2,
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switch (size) {
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case 0:
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gen_aa32_ld8u(tmp, addr, IS_USER(s));
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gen_aa32_ld8u(tmp, addr, get_mem_index(s));
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break;
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case 1:
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gen_aa32_ld16u(tmp, addr, IS_USER(s));
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gen_aa32_ld16u(tmp, addr, get_mem_index(s));
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break;
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case 2:
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case 3:
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gen_aa32_ld32u(tmp, addr, IS_USER(s));
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gen_aa32_ld32u(tmp, addr, get_mem_index(s));
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break;
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default:
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abort();
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@ -7191,7 +7191,7 @@ static void gen_load_exclusive(DisasContext *s, int rt, int rt2,
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TCGv_i32 tmp3 = tcg_temp_new_i32();
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tcg_gen_addi_i32(tmp2, addr, 4);
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gen_aa32_ld32u(tmp3, tmp2, IS_USER(s));
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gen_aa32_ld32u(tmp3, tmp2, get_mem_index(s));
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tcg_temp_free_i32(tmp2);
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tcg_gen_concat_i32_i64(cpu_exclusive_val, tmp, tmp3);
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store_reg(s, rt2, tmp3);
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@ -7242,14 +7242,14 @@ static void gen_store_exclusive(DisasContext *s, int rd, int rt, int rt2,
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tmp = tcg_temp_new_i32();
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switch (size) {
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case 0:
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gen_aa32_ld8u(tmp, addr, IS_USER(s));
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gen_aa32_ld8u(tmp, addr, get_mem_index(s));
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break;
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case 1:
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gen_aa32_ld16u(tmp, addr, IS_USER(s));
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gen_aa32_ld16u(tmp, addr, get_mem_index(s));
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break;
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case 2:
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case 3:
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gen_aa32_ld32u(tmp, addr, IS_USER(s));
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gen_aa32_ld32u(tmp, addr, get_mem_index(s));
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break;
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default:
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abort();
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@ -7260,7 +7260,7 @@ static void gen_store_exclusive(DisasContext *s, int rd, int rt, int rt2,
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TCGv_i32 tmp2 = tcg_temp_new_i32();
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TCGv_i32 tmp3 = tcg_temp_new_i32();
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tcg_gen_addi_i32(tmp2, addr, 4);
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gen_aa32_ld32u(tmp3, tmp2, IS_USER(s));
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gen_aa32_ld32u(tmp3, tmp2, get_mem_index(s));
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tcg_temp_free_i32(tmp2);
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tcg_gen_concat_i32_i64(val64, tmp, tmp3);
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tcg_temp_free_i32(tmp3);
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@ -7275,14 +7275,14 @@ static void gen_store_exclusive(DisasContext *s, int rd, int rt, int rt2,
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tmp = load_reg(s, rt);
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switch (size) {
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case 0:
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gen_aa32_st8(tmp, addr, IS_USER(s));
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gen_aa32_st8(tmp, addr, get_mem_index(s));
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break;
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case 1:
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gen_aa32_st16(tmp, addr, IS_USER(s));
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gen_aa32_st16(tmp, addr, get_mem_index(s));
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break;
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case 2:
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case 3:
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gen_aa32_st32(tmp, addr, IS_USER(s));
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gen_aa32_st32(tmp, addr, get_mem_index(s));
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break;
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default:
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abort();
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@ -7291,7 +7291,7 @@ static void gen_store_exclusive(DisasContext *s, int rd, int rt, int rt2,
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if (size == 3) {
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tcg_gen_addi_i32(addr, addr, 4);
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tmp = load_reg(s, rt2);
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gen_aa32_st32(tmp, addr, IS_USER(s));
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gen_aa32_st32(tmp, addr, get_mem_index(s));
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tcg_temp_free_i32(tmp);
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}
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tcg_gen_movi_i32(cpu_R[rd], 0);
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@ -7495,10 +7495,10 @@ static void disas_arm_insn(CPUARMState * env, DisasContext *s)
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tcg_gen_addi_i32(addr, addr, offset);
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/* Load PC into tmp and CPSR into tmp2. */
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tmp = tcg_temp_new_i32();
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gen_aa32_ld32u(tmp, addr, 0);
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gen_aa32_ld32u(tmp, addr, get_mem_index(s));
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tcg_gen_addi_i32(addr, addr, 4);
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tmp2 = tcg_temp_new_i32();
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gen_aa32_ld32u(tmp2, addr, 0);
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gen_aa32_ld32u(tmp2, addr, get_mem_index(s));
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if (insn & (1 << 21)) {
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/* Base writeback. */
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switch (i) {
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@ -8087,13 +8087,13 @@ static void disas_arm_insn(CPUARMState * env, DisasContext *s)
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tmp = tcg_temp_new_i32();
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switch (op1) {
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case 0: /* lda */
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gen_aa32_ld32u(tmp, addr, IS_USER(s));
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gen_aa32_ld32u(tmp, addr, get_mem_index(s));
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break;
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case 2: /* ldab */
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gen_aa32_ld8u(tmp, addr, IS_USER(s));
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gen_aa32_ld8u(tmp, addr, get_mem_index(s));
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break;
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case 3: /* ldah */
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gen_aa32_ld16u(tmp, addr, IS_USER(s));
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gen_aa32_ld16u(tmp, addr, get_mem_index(s));
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break;
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default:
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abort();
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@ -8104,13 +8104,13 @@ static void disas_arm_insn(CPUARMState * env, DisasContext *s)
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tmp = load_reg(s, rm);
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switch (op1) {
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case 0: /* stl */
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gen_aa32_st32(tmp, addr, IS_USER(s));
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gen_aa32_st32(tmp, addr, get_mem_index(s));
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break;
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case 2: /* stlb */
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gen_aa32_st8(tmp, addr, IS_USER(s));
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gen_aa32_st8(tmp, addr, get_mem_index(s));
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break;
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case 3: /* stlh */
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gen_aa32_st16(tmp, addr, IS_USER(s));
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gen_aa32_st16(tmp, addr, get_mem_index(s));
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break;
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default:
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abort();
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@ -8165,11 +8165,11 @@ static void disas_arm_insn(CPUARMState * env, DisasContext *s)
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tmp = load_reg(s, rm);
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tmp2 = tcg_temp_new_i32();
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if (insn & (1 << 22)) {
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gen_aa32_ld8u(tmp2, addr, IS_USER(s));
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gen_aa32_st8(tmp, addr, IS_USER(s));
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gen_aa32_ld8u(tmp2, addr, get_mem_index(s));
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gen_aa32_st8(tmp, addr, get_mem_index(s));
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} else {
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gen_aa32_ld32u(tmp2, addr, IS_USER(s));
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gen_aa32_st32(tmp, addr, IS_USER(s));
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gen_aa32_ld32u(tmp2, addr, get_mem_index(s));
|
||||
gen_aa32_st32(tmp, addr, get_mem_index(s));
|
||||
}
|
||||
tcg_temp_free_i32(tmp);
|
||||
tcg_temp_free_i32(addr);
|
||||
@ -8191,14 +8191,14 @@ static void disas_arm_insn(CPUARMState * env, DisasContext *s)
|
||||
tmp = tcg_temp_new_i32();
|
||||
switch(sh) {
|
||||
case 1:
|
||||
gen_aa32_ld16u(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld16u(tmp, addr, get_mem_index(s));
|
||||
break;
|
||||
case 2:
|
||||
gen_aa32_ld8s(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld8s(tmp, addr, get_mem_index(s));
|
||||
break;
|
||||
default:
|
||||
case 3:
|
||||
gen_aa32_ld16s(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld16s(tmp, addr, get_mem_index(s));
|
||||
break;
|
||||
}
|
||||
load = 1;
|
||||
@ -8208,21 +8208,21 @@ static void disas_arm_insn(CPUARMState * env, DisasContext *s)
|
||||
if (sh & 1) {
|
||||
/* store */
|
||||
tmp = load_reg(s, rd);
|
||||
gen_aa32_st32(tmp, addr, IS_USER(s));
|
||||
gen_aa32_st32(tmp, addr, get_mem_index(s));
|
||||
tcg_temp_free_i32(tmp);
|
||||
tcg_gen_addi_i32(addr, addr, 4);
|
||||
tmp = load_reg(s, rd + 1);
|
||||
gen_aa32_st32(tmp, addr, IS_USER(s));
|
||||
gen_aa32_st32(tmp, addr, get_mem_index(s));
|
||||
tcg_temp_free_i32(tmp);
|
||||
load = 0;
|
||||
} else {
|
||||
/* load */
|
||||
tmp = tcg_temp_new_i32();
|
||||
gen_aa32_ld32u(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld32u(tmp, addr, get_mem_index(s));
|
||||
store_reg(s, rd, tmp);
|
||||
tcg_gen_addi_i32(addr, addr, 4);
|
||||
tmp = tcg_temp_new_i32();
|
||||
gen_aa32_ld32u(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld32u(tmp, addr, get_mem_index(s));
|
||||
rd++;
|
||||
load = 1;
|
||||
}
|
||||
@ -8230,7 +8230,7 @@ static void disas_arm_insn(CPUARMState * env, DisasContext *s)
|
||||
} else {
|
||||
/* store */
|
||||
tmp = load_reg(s, rd);
|
||||
gen_aa32_st16(tmp, addr, IS_USER(s));
|
||||
gen_aa32_st16(tmp, addr, get_mem_index(s));
|
||||
tcg_temp_free_i32(tmp);
|
||||
load = 0;
|
||||
}
|
||||
@ -8657,7 +8657,7 @@ static void disas_arm_insn(CPUARMState * env, DisasContext *s)
|
||||
if (insn & (1 << 20)) {
|
||||
/* load */
|
||||
tmp = tcg_temp_new_i32();
|
||||
gen_aa32_ld32u(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld32u(tmp, addr, get_mem_index(s));
|
||||
if (user) {
|
||||
tmp2 = tcg_const_i32(i);
|
||||
gen_helper_set_user_reg(cpu_env, tmp2, tmp);
|
||||
@ -8684,7 +8684,7 @@ static void disas_arm_insn(CPUARMState * env, DisasContext *s)
|
||||
} else {
|
||||
tmp = load_reg(s, i);
|
||||
}
|
||||
gen_aa32_st32(tmp, addr, IS_USER(s));
|
||||
gen_aa32_st32(tmp, addr, get_mem_index(s));
|
||||
tcg_temp_free_i32(tmp);
|
||||
}
|
||||
j++;
|
||||
@ -8950,20 +8950,20 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
|
||||
if (insn & (1 << 20)) {
|
||||
/* ldrd */
|
||||
tmp = tcg_temp_new_i32();
|
||||
gen_aa32_ld32u(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld32u(tmp, addr, get_mem_index(s));
|
||||
store_reg(s, rs, tmp);
|
||||
tcg_gen_addi_i32(addr, addr, 4);
|
||||
tmp = tcg_temp_new_i32();
|
||||
gen_aa32_ld32u(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld32u(tmp, addr, get_mem_index(s));
|
||||
store_reg(s, rd, tmp);
|
||||
} else {
|
||||
/* strd */
|
||||
tmp = load_reg(s, rs);
|
||||
gen_aa32_st32(tmp, addr, IS_USER(s));
|
||||
gen_aa32_st32(tmp, addr, get_mem_index(s));
|
||||
tcg_temp_free_i32(tmp);
|
||||
tcg_gen_addi_i32(addr, addr, 4);
|
||||
tmp = load_reg(s, rd);
|
||||
gen_aa32_st32(tmp, addr, IS_USER(s));
|
||||
gen_aa32_st32(tmp, addr, get_mem_index(s));
|
||||
tcg_temp_free_i32(tmp);
|
||||
}
|
||||
if (insn & (1 << 21)) {
|
||||
@ -9001,11 +9001,11 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
|
||||
tcg_gen_add_i32(addr, addr, tmp);
|
||||
tcg_temp_free_i32(tmp);
|
||||
tmp = tcg_temp_new_i32();
|
||||
gen_aa32_ld16u(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld16u(tmp, addr, get_mem_index(s));
|
||||
} else { /* tbb */
|
||||
tcg_temp_free_i32(tmp);
|
||||
tmp = tcg_temp_new_i32();
|
||||
gen_aa32_ld8u(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld8u(tmp, addr, get_mem_index(s));
|
||||
}
|
||||
tcg_temp_free_i32(addr);
|
||||
tcg_gen_shli_i32(tmp, tmp, 1);
|
||||
@ -9042,13 +9042,13 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
|
||||
tmp = tcg_temp_new_i32();
|
||||
switch (op) {
|
||||
case 0: /* ldab */
|
||||
gen_aa32_ld8u(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld8u(tmp, addr, get_mem_index(s));
|
||||
break;
|
||||
case 1: /* ldah */
|
||||
gen_aa32_ld16u(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld16u(tmp, addr, get_mem_index(s));
|
||||
break;
|
||||
case 2: /* lda */
|
||||
gen_aa32_ld32u(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld32u(tmp, addr, get_mem_index(s));
|
||||
break;
|
||||
default:
|
||||
abort();
|
||||
@ -9058,13 +9058,13 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
|
||||
tmp = load_reg(s, rs);
|
||||
switch (op) {
|
||||
case 0: /* stlb */
|
||||
gen_aa32_st8(tmp, addr, IS_USER(s));
|
||||
gen_aa32_st8(tmp, addr, get_mem_index(s));
|
||||
break;
|
||||
case 1: /* stlh */
|
||||
gen_aa32_st16(tmp, addr, IS_USER(s));
|
||||
gen_aa32_st16(tmp, addr, get_mem_index(s));
|
||||
break;
|
||||
case 2: /* stl */
|
||||
gen_aa32_st32(tmp, addr, IS_USER(s));
|
||||
gen_aa32_st32(tmp, addr, get_mem_index(s));
|
||||
break;
|
||||
default:
|
||||
abort();
|
||||
@ -9092,10 +9092,10 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
|
||||
tcg_gen_addi_i32(addr, addr, -8);
|
||||
/* Load PC into tmp and CPSR into tmp2. */
|
||||
tmp = tcg_temp_new_i32();
|
||||
gen_aa32_ld32u(tmp, addr, 0);
|
||||
gen_aa32_ld32u(tmp, addr, get_mem_index(s));
|
||||
tcg_gen_addi_i32(addr, addr, 4);
|
||||
tmp2 = tcg_temp_new_i32();
|
||||
gen_aa32_ld32u(tmp2, addr, 0);
|
||||
gen_aa32_ld32u(tmp2, addr, get_mem_index(s));
|
||||
if (insn & (1 << 21)) {
|
||||
/* Base writeback. */
|
||||
if (insn & (1 << 24)) {
|
||||
@ -9134,7 +9134,7 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
|
||||
if (insn & (1 << 20)) {
|
||||
/* Load. */
|
||||
tmp = tcg_temp_new_i32();
|
||||
gen_aa32_ld32u(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld32u(tmp, addr, get_mem_index(s));
|
||||
if (i == 15) {
|
||||
gen_bx(s, tmp);
|
||||
} else if (i == rn) {
|
||||
@ -9146,7 +9146,7 @@ static int disas_thumb2_insn(CPUARMState *env, DisasContext *s, uint16_t insn_hw
|
||||
} else {
|
||||
/* Store. */
|
||||
tmp = load_reg(s, i);
|
||||
gen_aa32_st32(tmp, addr, IS_USER(s));
|
||||
gen_aa32_st32(tmp, addr, get_mem_index(s));
|
||||
tcg_temp_free_i32(tmp);
|
||||
}
|
||||
tcg_gen_addi_i32(addr, addr, 4);
|
||||
@ -10126,7 +10126,7 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
|
||||
addr = tcg_temp_new_i32();
|
||||
tcg_gen_movi_i32(addr, val);
|
||||
tmp = tcg_temp_new_i32();
|
||||
gen_aa32_ld32u(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld32u(tmp, addr, get_mem_index(s));
|
||||
tcg_temp_free_i32(addr);
|
||||
store_reg(s, rd, tmp);
|
||||
break;
|
||||
@ -10329,28 +10329,28 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
|
||||
|
||||
switch (op) {
|
||||
case 0: /* str */
|
||||
gen_aa32_st32(tmp, addr, IS_USER(s));
|
||||
gen_aa32_st32(tmp, addr, get_mem_index(s));
|
||||
break;
|
||||
case 1: /* strh */
|
||||
gen_aa32_st16(tmp, addr, IS_USER(s));
|
||||
gen_aa32_st16(tmp, addr, get_mem_index(s));
|
||||
break;
|
||||
case 2: /* strb */
|
||||
gen_aa32_st8(tmp, addr, IS_USER(s));
|
||||
gen_aa32_st8(tmp, addr, get_mem_index(s));
|
||||
break;
|
||||
case 3: /* ldrsb */
|
||||
gen_aa32_ld8s(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld8s(tmp, addr, get_mem_index(s));
|
||||
break;
|
||||
case 4: /* ldr */
|
||||
gen_aa32_ld32u(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld32u(tmp, addr, get_mem_index(s));
|
||||
break;
|
||||
case 5: /* ldrh */
|
||||
gen_aa32_ld16u(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld16u(tmp, addr, get_mem_index(s));
|
||||
break;
|
||||
case 6: /* ldrb */
|
||||
gen_aa32_ld8u(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld8u(tmp, addr, get_mem_index(s));
|
||||
break;
|
||||
case 7: /* ldrsh */
|
||||
gen_aa32_ld16s(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld16s(tmp, addr, get_mem_index(s));
|
||||
break;
|
||||
}
|
||||
if (op >= 3) { /* load */
|
||||
@ -10372,12 +10372,12 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
|
||||
if (insn & (1 << 11)) {
|
||||
/* load */
|
||||
tmp = tcg_temp_new_i32();
|
||||
gen_aa32_ld32u(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld32u(tmp, addr, get_mem_index(s));
|
||||
store_reg(s, rd, tmp);
|
||||
} else {
|
||||
/* store */
|
||||
tmp = load_reg(s, rd);
|
||||
gen_aa32_st32(tmp, addr, IS_USER(s));
|
||||
gen_aa32_st32(tmp, addr, get_mem_index(s));
|
||||
tcg_temp_free_i32(tmp);
|
||||
}
|
||||
tcg_temp_free_i32(addr);
|
||||
@ -10394,12 +10394,12 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
|
||||
if (insn & (1 << 11)) {
|
||||
/* load */
|
||||
tmp = tcg_temp_new_i32();
|
||||
gen_aa32_ld8u(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld8u(tmp, addr, get_mem_index(s));
|
||||
store_reg(s, rd, tmp);
|
||||
} else {
|
||||
/* store */
|
||||
tmp = load_reg(s, rd);
|
||||
gen_aa32_st8(tmp, addr, IS_USER(s));
|
||||
gen_aa32_st8(tmp, addr, get_mem_index(s));
|
||||
tcg_temp_free_i32(tmp);
|
||||
}
|
||||
tcg_temp_free_i32(addr);
|
||||
@ -10416,12 +10416,12 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
|
||||
if (insn & (1 << 11)) {
|
||||
/* load */
|
||||
tmp = tcg_temp_new_i32();
|
||||
gen_aa32_ld16u(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld16u(tmp, addr, get_mem_index(s));
|
||||
store_reg(s, rd, tmp);
|
||||
} else {
|
||||
/* store */
|
||||
tmp = load_reg(s, rd);
|
||||
gen_aa32_st16(tmp, addr, IS_USER(s));
|
||||
gen_aa32_st16(tmp, addr, get_mem_index(s));
|
||||
tcg_temp_free_i32(tmp);
|
||||
}
|
||||
tcg_temp_free_i32(addr);
|
||||
@ -10437,12 +10437,12 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
|
||||
if (insn & (1 << 11)) {
|
||||
/* load */
|
||||
tmp = tcg_temp_new_i32();
|
||||
gen_aa32_ld32u(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld32u(tmp, addr, get_mem_index(s));
|
||||
store_reg(s, rd, tmp);
|
||||
} else {
|
||||
/* store */
|
||||
tmp = load_reg(s, rd);
|
||||
gen_aa32_st32(tmp, addr, IS_USER(s));
|
||||
gen_aa32_st32(tmp, addr, get_mem_index(s));
|
||||
tcg_temp_free_i32(tmp);
|
||||
}
|
||||
tcg_temp_free_i32(addr);
|
||||
@ -10510,12 +10510,12 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
|
||||
if (insn & (1 << 11)) {
|
||||
/* pop */
|
||||
tmp = tcg_temp_new_i32();
|
||||
gen_aa32_ld32u(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld32u(tmp, addr, get_mem_index(s));
|
||||
store_reg(s, i, tmp);
|
||||
} else {
|
||||
/* push */
|
||||
tmp = load_reg(s, i);
|
||||
gen_aa32_st32(tmp, addr, IS_USER(s));
|
||||
gen_aa32_st32(tmp, addr, get_mem_index(s));
|
||||
tcg_temp_free_i32(tmp);
|
||||
}
|
||||
/* advance to the next address. */
|
||||
@ -10527,13 +10527,13 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
|
||||
if (insn & (1 << 11)) {
|
||||
/* pop pc */
|
||||
tmp = tcg_temp_new_i32();
|
||||
gen_aa32_ld32u(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld32u(tmp, addr, get_mem_index(s));
|
||||
/* don't set the pc until the rest of the instruction
|
||||
has completed */
|
||||
} else {
|
||||
/* push lr */
|
||||
tmp = load_reg(s, 14);
|
||||
gen_aa32_st32(tmp, addr, IS_USER(s));
|
||||
gen_aa32_st32(tmp, addr, get_mem_index(s));
|
||||
tcg_temp_free_i32(tmp);
|
||||
}
|
||||
tcg_gen_addi_i32(addr, addr, 4);
|
||||
@ -10662,7 +10662,7 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
|
||||
if (insn & (1 << 11)) {
|
||||
/* load */
|
||||
tmp = tcg_temp_new_i32();
|
||||
gen_aa32_ld32u(tmp, addr, IS_USER(s));
|
||||
gen_aa32_ld32u(tmp, addr, get_mem_index(s));
|
||||
if (i == rn) {
|
||||
loaded_var = tmp;
|
||||
} else {
|
||||
@ -10671,7 +10671,7 @@ static void disas_thumb_insn(CPUARMState *env, DisasContext *s)
|
||||
} else {
|
||||
/* store */
|
||||
tmp = load_reg(s, i);
|
||||
gen_aa32_st32(tmp, addr, IS_USER(s));
|
||||
gen_aa32_st32(tmp, addr, get_mem_index(s));
|
||||
tcg_temp_free_i32(tmp);
|
||||
}
|
||||
/* advance to the next address */
|
||||
|
Loading…
Reference in New Issue
Block a user