mirror of
https://github.com/qemu/qemu.git
synced 2024-11-25 03:43:37 +08:00
tcg/riscv: Add the mov and movi instruction
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Michael Clark <mjc@sifive.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <bd6a45c73a67b77ddaa2fe590a6bb8ee422b9683.1545246859.git.alistair.francis@wdc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
parent
dfa8e74f94
commit
6cd2eda39f
@ -510,3 +510,89 @@ static bool patch_reloc(tcg_insn_unit *code_ptr, int type,
|
||||
tcg_abort();
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* TCG intrinsics
|
||||
*/
|
||||
|
||||
static void tcg_out_mov(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg)
|
||||
{
|
||||
if (ret == arg) {
|
||||
return;
|
||||
}
|
||||
switch (type) {
|
||||
case TCG_TYPE_I32:
|
||||
case TCG_TYPE_I64:
|
||||
tcg_out_opc_imm(s, OPC_ADDI, ret, arg, 0);
|
||||
break;
|
||||
default:
|
||||
g_assert_not_reached();
|
||||
}
|
||||
}
|
||||
|
||||
static void tcg_out_movi(TCGContext *s, TCGType type, TCGReg rd,
|
||||
tcg_target_long val)
|
||||
{
|
||||
tcg_target_long lo, hi, tmp;
|
||||
int shift, ret;
|
||||
|
||||
if (TCG_TARGET_REG_BITS == 64 && type == TCG_TYPE_I32) {
|
||||
val = (int32_t)val;
|
||||
}
|
||||
|
||||
lo = sextreg(val, 0, 12);
|
||||
if (val == lo) {
|
||||
tcg_out_opc_imm(s, OPC_ADDI, rd, TCG_REG_ZERO, lo);
|
||||
return;
|
||||
}
|
||||
|
||||
hi = val - lo;
|
||||
if (TCG_TARGET_REG_BITS == 32 || val == (int32_t)val) {
|
||||
tcg_out_opc_upper(s, OPC_LUI, rd, hi);
|
||||
if (lo != 0) {
|
||||
tcg_out_opc_imm(s, OPC_ADDIW, rd, rd, lo);
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/* We can only be here if TCG_TARGET_REG_BITS != 32 */
|
||||
tmp = tcg_pcrel_diff(s, (void *)val);
|
||||
if (tmp == (int32_t)tmp) {
|
||||
tcg_out_opc_upper(s, OPC_AUIPC, rd, 0);
|
||||
tcg_out_opc_imm(s, OPC_ADDI, rd, rd, 0);
|
||||
ret = reloc_call(s->code_ptr - 2, (tcg_insn_unit *)val);
|
||||
tcg_debug_assert(ret == true);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Look for a single 20-bit section. */
|
||||
shift = ctz64(val);
|
||||
tmp = val >> shift;
|
||||
if (tmp == sextreg(tmp, 0, 20)) {
|
||||
tcg_out_opc_upper(s, OPC_LUI, rd, tmp << 12);
|
||||
if (shift > 12) {
|
||||
tcg_out_opc_imm(s, OPC_SLLI, rd, rd, shift - 12);
|
||||
} else {
|
||||
tcg_out_opc_imm(s, OPC_SRAI, rd, rd, 12 - shift);
|
||||
}
|
||||
return;
|
||||
}
|
||||
|
||||
/* Look for a few high zero bits, with lots of bits set in the middle. */
|
||||
shift = clz64(val);
|
||||
tmp = val << shift;
|
||||
if (tmp == sextreg(tmp, 12, 20) << 12) {
|
||||
tcg_out_opc_upper(s, OPC_LUI, rd, tmp);
|
||||
tcg_out_opc_imm(s, OPC_SRLI, rd, rd, shift);
|
||||
return;
|
||||
} else if (tmp == sextreg(tmp, 0, 12)) {
|
||||
tcg_out_opc_imm(s, OPC_ADDI, rd, TCG_REG_ZERO, tmp);
|
||||
tcg_out_opc_imm(s, OPC_SRLI, rd, rd, shift);
|
||||
return;
|
||||
}
|
||||
|
||||
/* Drop into the constant pool. */
|
||||
new_pool_label(s, val, R_RISCV_CALL, s->code_ptr, 0);
|
||||
tcg_out_opc_upper(s, OPC_AUIPC, rd, 0);
|
||||
tcg_out_opc_imm(s, OPC_LD, rd, rd, 0);
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user