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target/alpha: Switch to do_transaction_failed() hook
Switch the alpha target from the old unassigned_access hook to the new do_transaction_failed hook. This allows us to resolve a ??? in the old hook implementation. The only part of the alpha target that does physical memory accesses is reading the page table -- add a TODO comment there to the effect that we should handle bus faults on page table walks. (Since the palcode doesn't actually do anything useful on a bus fault anyway it's a bit moot for now.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <1502196172-13818-1-git-send-email-peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -297,7 +297,7 @@ static void alpha_cpu_class_init(ObjectClass *oc, void *data)
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#ifdef CONFIG_USER_ONLY
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cc->handle_mmu_fault = alpha_cpu_handle_mmu_fault;
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#else
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cc->do_unassigned_access = alpha_cpu_unassigned_access;
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cc->do_transaction_failed = alpha_cpu_do_transaction_failed;
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cc->do_unaligned_access = alpha_cpu_do_unaligned_access;
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cc->get_phys_page_debug = alpha_cpu_get_phys_page_debug;
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dc->vmsd = &vmstate_alpha_cpu;
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@ -486,9 +486,11 @@ void cpu_alpha_store_fpcr (CPUAlphaState *env, uint64_t val);
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uint64_t cpu_alpha_load_gr(CPUAlphaState *env, unsigned reg);
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void cpu_alpha_store_gr(CPUAlphaState *env, unsigned reg, uint64_t val);
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#ifndef CONFIG_USER_ONLY
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QEMU_NORETURN void alpha_cpu_unassigned_access(CPUState *cpu, hwaddr addr,
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bool is_write, bool is_exec,
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int unused, unsigned size);
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void alpha_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
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vaddr addr, unsigned size,
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MMUAccessType access_type,
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int mmu_idx, MemTxAttrs attrs,
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MemTxResult response, uintptr_t retaddr);
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#endif
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static inline void cpu_get_tb_cpu_state(CPUAlphaState *env, target_ulong *pc,
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@ -163,6 +163,14 @@ static int get_physical_address(CPUAlphaState *env, target_ulong addr,
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pt = env->ptbr;
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/* TODO: rather than using ldq_phys() to read the page table we should
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* use address_space_ldq() so that we can handle the case when
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* the page table read gives a bus fault, rather than ignoring it.
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* For the existing code the zero data that ldq_phys will return for
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* an access to invalid memory will result in our treating the page
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* table as invalid, which may even be the right behaviour.
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*/
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/* L1 page table read. */
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index = (addr >> (TARGET_PAGE_BITS + 20)) & 0x3ff;
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L1pte = ldq_phys(cs->as, pt + index*8);
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@ -49,22 +49,23 @@ void alpha_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
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cpu_loop_exit(cs);
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}
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void alpha_cpu_unassigned_access(CPUState *cs, hwaddr addr,
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bool is_write, bool is_exec, int unused,
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unsigned size)
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void alpha_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
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vaddr addr, unsigned size,
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MMUAccessType access_type,
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int mmu_idx, MemTxAttrs attrs,
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MemTxResult response, uintptr_t retaddr)
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{
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AlphaCPU *cpu = ALPHA_CPU(cs);
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CPUAlphaState *env = &cpu->env;
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if (retaddr) {
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cpu_restore_state(cs, retaddr);
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}
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env->trap_arg0 = addr;
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env->trap_arg1 = is_write ? 1 : 0;
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env->trap_arg1 = access_type == MMU_DATA_STORE ? 1 : 0;
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cs->exception_index = EXCP_MCHK;
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env->error_code = 0;
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/* ??? We should cpu_restore_state to the faulting insn, but this hook
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does not have access to the retaddr value from the original helper.
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It's all moot until the QEMU PALcode grows an MCHK handler. */
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cpu_loop_exit(cs);
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}
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