From 690f50c27d6046f3f34e059ee8e8944eae1b7390 Mon Sep 17 00:00:00 2001 From: Manos Pitsidianakis Date: Tue, 20 Feb 2024 10:52:28 +0200 Subject: [PATCH] target/sparc: correct typos MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Correct typos automatically found with the `typos` tool Signed-off-by: Manos Pitsidianakis Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Michael Tokarev Signed-off-by: Michael Tokarev --- target/sparc/asi.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/target/sparc/asi.h b/target/sparc/asi.h index 3270ed0c7f..a66829674b 100644 --- a/target/sparc/asi.h +++ b/target/sparc/asi.h @@ -145,14 +145,14 @@ * and later ASIs. */ #define ASI_REAL 0x14 /* Real address, cacheable */ -#define ASI_PHYS_USE_EC 0x14 /* PADDR, E-cachable */ -#define ASI_REAL_IO 0x15 /* Real address, non-cachable */ +#define ASI_PHYS_USE_EC 0x14 /* PADDR, E-cacheable */ +#define ASI_REAL_IO 0x15 /* Real address, non-cacheable */ #define ASI_PHYS_BYPASS_EC_E 0x15 /* PADDR, E-bit */ #define ASI_BLK_AIUP_4V 0x16 /* (4V) Prim, user, block ld/st */ #define ASI_BLK_AIUS_4V 0x17 /* (4V) Sec, user, block ld/st */ #define ASI_REAL_L 0x1c /* Real address, cacheable, LE */ -#define ASI_PHYS_USE_EC_L 0x1c /* PADDR, E-cachable, little endian*/ -#define ASI_REAL_IO_L 0x1d /* Real address, non-cachable, LE */ +#define ASI_PHYS_USE_EC_L 0x1c /* PADDR, E-cacheable, little endian*/ +#define ASI_REAL_IO_L 0x1d /* Real address, non-cacheable, LE */ #define ASI_PHYS_BYPASS_EC_E_L 0x1d /* PADDR, E-bit, little endian */ #define ASI_BLK_AIUP_L_4V 0x1e /* (4V) Prim, user, block, l-endian*/ #define ASI_BLK_AIUS_L_4V 0x1f /* (4V) Sec, user, block, l-endian */