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Fix Sparc ASR handling (Aurelien Jarno)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2566 c046a42c-6fe2-441c-8c8c-71466251a162
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@ -1130,11 +1130,19 @@ static void disas_sparc_insn(DisasContext * dc)
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rs1 = GET_FIELD(insn, 13, 17);
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switch(rs1) {
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case 0: /* rdy */
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gen_op_movtl_T0_env(offsetof(CPUSPARCState, y));
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#ifndef TARGET_SPARC64
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case 0x01 ... 0x0e: /* undefined in the SPARCv8
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manual, rdy on the microSPARC
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II */
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case 0x0f: /* stbar in the SPARCv8 manual,
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rdy on the microSPARC II */
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case 0x10 ... 0x1f: /* implementation-dependent in the
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SPARCv8 manual, rdy on the
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microSPARC II */
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#endif
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gen_op_movtl_T0_env(offsetof(CPUSPARCState, y));
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gen_movl_T0_reg(rd);
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break;
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case 15: /* stbar / V9 membar */
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break; /* no effect? */
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#ifdef TARGET_SPARC64
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case 0x2: /* V9 rdccr */
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gen_op_rdccr();
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@ -1160,6 +1168,8 @@ static void disas_sparc_insn(DisasContext * dc)
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gen_op_movl_T0_env(offsetof(CPUSPARCState, fprs));
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gen_movl_T0_reg(rd);
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break;
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case 0xf: /* V9 membar */
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break; /* no effect */
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case 0x13: /* Graphics Status */
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if (gen_trap_ifnofpu(dc))
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goto jmp_insn;
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@ -1879,7 +1889,17 @@ static void disas_sparc_insn(DisasContext * dc)
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gen_op_xor_T1_T0();
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gen_op_movtl_env_T0(offsetof(CPUSPARCState, y));
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break;
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#ifdef TARGET_SPARC64
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#ifndef TARGET_SPARC64
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case 0x01 ... 0x0f: /* undefined in the
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SPARCv8 manual, nop
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on the microSPARC
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II */
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case 0x10 ... 0x1f: /* implementation-dependent
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in the SPARCv8
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manual, nop on the
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microSPARC II */
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break;
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#else
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case 0x2: /* V9 wrccr */
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gen_op_wrccr();
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break;
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