mirror of
https://github.com/qemu/qemu.git
synced 2024-11-25 03:43:37 +08:00
s390x/tcg: Simplify vfc64() handling
Pass the m5 field via simd_data() and don't provide specialized handlers for single-element variants. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: David Hildenbrand <david@redhat.com> Message-Id: <20210608092337.12221-6-david@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
This commit is contained in:
parent
21bd6ea2b3
commit
64deb65afe
@ -250,17 +250,11 @@ DEF_HELPER_FLAGS_5(gvec_vfa64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
|
||||
DEF_HELPER_4(gvec_wfc64, void, cptr, cptr, env, i32)
|
||||
DEF_HELPER_4(gvec_wfk64, void, cptr, cptr, env, i32)
|
||||
DEF_HELPER_FLAGS_5(gvec_vfce64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
|
||||
DEF_HELPER_FLAGS_5(gvec_vfce64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
|
||||
DEF_HELPER_5(gvec_vfce64_cc, void, ptr, cptr, cptr, env, i32)
|
||||
DEF_HELPER_5(gvec_vfce64s_cc, void, ptr, cptr, cptr, env, i32)
|
||||
DEF_HELPER_FLAGS_5(gvec_vfch64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
|
||||
DEF_HELPER_FLAGS_5(gvec_vfch64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
|
||||
DEF_HELPER_5(gvec_vfch64_cc, void, ptr, cptr, cptr, env, i32)
|
||||
DEF_HELPER_5(gvec_vfch64s_cc, void, ptr, cptr, cptr, env, i32)
|
||||
DEF_HELPER_FLAGS_5(gvec_vfche64, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
|
||||
DEF_HELPER_FLAGS_5(gvec_vfche64s, TCG_CALL_NO_WG, void, ptr, cptr, cptr, env, i32)
|
||||
DEF_HELPER_5(gvec_vfche64_cc, void, ptr, cptr, cptr, env, i32)
|
||||
DEF_HELPER_5(gvec_vfche64s_cc, void, ptr, cptr, cptr, env, i32)
|
||||
DEF_HELPER_FLAGS_4(gvec_vcdg64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
|
||||
DEF_HELPER_FLAGS_4(gvec_vcdlg64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
|
||||
DEF_HELPER_FLAGS_4(gvec_vcgd64, TCG_CALL_NO_WG, void, ptr, cptr, env, i32)
|
||||
|
@ -2497,7 +2497,6 @@ static DisasJumpType op_vfc(DisasContext *s, DisasOps *o)
|
||||
const uint8_t fpf = get_field(s, m4);
|
||||
const uint8_t m5 = get_field(s, m5);
|
||||
const uint8_t m6 = get_field(s, m6);
|
||||
const bool se = extract32(m5, 3, 1);
|
||||
const bool cs = extract32(m6, 0, 1);
|
||||
gen_helper_gvec_3_ptr *fn;
|
||||
|
||||
@ -2506,37 +2505,21 @@ static DisasJumpType op_vfc(DisasContext *s, DisasOps *o)
|
||||
return DISAS_NORETURN;
|
||||
}
|
||||
|
||||
if (cs) {
|
||||
switch (s->fields.op2) {
|
||||
case 0xe8:
|
||||
fn = se ? gen_helper_gvec_vfce64s_cc : gen_helper_gvec_vfce64_cc;
|
||||
break;
|
||||
case 0xeb:
|
||||
fn = se ? gen_helper_gvec_vfch64s_cc : gen_helper_gvec_vfch64_cc;
|
||||
break;
|
||||
case 0xea:
|
||||
fn = se ? gen_helper_gvec_vfche64s_cc : gen_helper_gvec_vfche64_cc;
|
||||
break;
|
||||
default:
|
||||
g_assert_not_reached();
|
||||
}
|
||||
} else {
|
||||
switch (s->fields.op2) {
|
||||
case 0xe8:
|
||||
fn = se ? gen_helper_gvec_vfce64s : gen_helper_gvec_vfce64;
|
||||
break;
|
||||
case 0xeb:
|
||||
fn = se ? gen_helper_gvec_vfch64s : gen_helper_gvec_vfch64;
|
||||
break;
|
||||
case 0xea:
|
||||
fn = se ? gen_helper_gvec_vfche64s : gen_helper_gvec_vfche64;
|
||||
break;
|
||||
default:
|
||||
g_assert_not_reached();
|
||||
}
|
||||
switch (s->fields.op2) {
|
||||
case 0xe8:
|
||||
fn = cs ? gen_helper_gvec_vfce64_cc : gen_helper_gvec_vfce64;
|
||||
break;
|
||||
case 0xeb:
|
||||
fn = cs ? gen_helper_gvec_vfch64_cc : gen_helper_gvec_vfch64;
|
||||
break;
|
||||
case 0xea:
|
||||
fn = cs ? gen_helper_gvec_vfche64_cc : gen_helper_gvec_vfche64;
|
||||
break;
|
||||
default:
|
||||
g_assert_not_reached();
|
||||
}
|
||||
gen_gvec_3_ptr(get_field(s, v1), get_field(s, v2),
|
||||
get_field(s, v3), cpu_env, 0, fn);
|
||||
gen_gvec_3_ptr(get_field(s, v1), get_field(s, v2), get_field(s, v3),
|
||||
cpu_env, m5, fn);
|
||||
if (cs) {
|
||||
set_cc_static(s);
|
||||
}
|
||||
|
@ -239,8 +239,8 @@ static int vfc64(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
|
||||
int i;
|
||||
|
||||
for (i = 0; i < 2; i++) {
|
||||
const float64 a = s390_vec_read_element64(v2, i);
|
||||
const float64 b = s390_vec_read_element64(v3, i);
|
||||
const float64 a = s390_vec_read_float64(v2, i);
|
||||
const float64 b = s390_vec_read_float64(v3, i);
|
||||
|
||||
/* swap the order of the parameters, so we can use existing functions */
|
||||
if (fn(b, a, &env->fpu_status)) {
|
||||
@ -261,77 +261,31 @@ static int vfc64(S390Vector *v1, const S390Vector *v2, const S390Vector *v3,
|
||||
return 3;
|
||||
}
|
||||
|
||||
void HELPER(gvec_vfce64)(void *v1, const void *v2, const void *v3,
|
||||
CPUS390XState *env, uint32_t desc)
|
||||
{
|
||||
vfc64(v1, v2, v3, env, false, float64_eq_quiet, GETPC());
|
||||
#define DEF_GVEC_VFC_B(NAME, OP, BITS) \
|
||||
void HELPER(gvec_##NAME##BITS)(void *v1, const void *v2, const void *v3, \
|
||||
CPUS390XState *env, uint32_t desc) \
|
||||
{ \
|
||||
const bool se = extract32(simd_data(desc), 3, 1); \
|
||||
vfc##BITS##_fn fn = float##BITS##_##OP##_quiet; \
|
||||
\
|
||||
vfc##BITS(v1, v2, v3, env, se, fn, GETPC()); \
|
||||
} \
|
||||
\
|
||||
void HELPER(gvec_##NAME##BITS##_cc)(void *v1, const void *v2, const void *v3, \
|
||||
CPUS390XState *env, uint32_t desc) \
|
||||
{ \
|
||||
const bool se = extract32(simd_data(desc), 3, 1); \
|
||||
vfc##BITS##_fn fn = float##BITS##_##OP##_quiet; \
|
||||
\
|
||||
env->cc_op = vfc##BITS(v1, v2, v3, env, se, fn, GETPC()); \
|
||||
}
|
||||
|
||||
void HELPER(gvec_vfce64s)(void *v1, const void *v2, const void *v3,
|
||||
CPUS390XState *env, uint32_t desc)
|
||||
{
|
||||
vfc64(v1, v2, v3, env, true, float64_eq_quiet, GETPC());
|
||||
}
|
||||
#define DEF_GVEC_VFC(NAME, OP) \
|
||||
DEF_GVEC_VFC_B(NAME, OP, 64)
|
||||
|
||||
void HELPER(gvec_vfce64_cc)(void *v1, const void *v2, const void *v3,
|
||||
CPUS390XState *env, uint32_t desc)
|
||||
{
|
||||
env->cc_op = vfc64(v1, v2, v3, env, false, float64_eq_quiet, GETPC());
|
||||
}
|
||||
|
||||
void HELPER(gvec_vfce64s_cc)(void *v1, const void *v2, const void *v3,
|
||||
CPUS390XState *env, uint32_t desc)
|
||||
{
|
||||
env->cc_op = vfc64(v1, v2, v3, env, true, float64_eq_quiet, GETPC());
|
||||
}
|
||||
|
||||
void HELPER(gvec_vfch64)(void *v1, const void *v2, const void *v3,
|
||||
CPUS390XState *env, uint32_t desc)
|
||||
{
|
||||
vfc64(v1, v2, v3, env, false, float64_lt_quiet, GETPC());
|
||||
}
|
||||
|
||||
void HELPER(gvec_vfch64s)(void *v1, const void *v2, const void *v3,
|
||||
CPUS390XState *env, uint32_t desc)
|
||||
{
|
||||
vfc64(v1, v2, v3, env, true, float64_lt_quiet, GETPC());
|
||||
}
|
||||
|
||||
void HELPER(gvec_vfch64_cc)(void *v1, const void *v2, const void *v3,
|
||||
CPUS390XState *env, uint32_t desc)
|
||||
{
|
||||
env->cc_op = vfc64(v1, v2, v3, env, false, float64_lt_quiet, GETPC());
|
||||
}
|
||||
|
||||
void HELPER(gvec_vfch64s_cc)(void *v1, const void *v2, const void *v3,
|
||||
CPUS390XState *env, uint32_t desc)
|
||||
{
|
||||
env->cc_op = vfc64(v1, v2, v3, env, true, float64_lt_quiet, GETPC());
|
||||
}
|
||||
|
||||
void HELPER(gvec_vfche64)(void *v1, const void *v2, const void *v3,
|
||||
CPUS390XState *env, uint32_t desc)
|
||||
{
|
||||
vfc64(v1, v2, v3, env, false, float64_le_quiet, GETPC());
|
||||
}
|
||||
|
||||
void HELPER(gvec_vfche64s)(void *v1, const void *v2, const void *v3,
|
||||
CPUS390XState *env, uint32_t desc)
|
||||
{
|
||||
vfc64(v1, v2, v3, env, true, float64_le_quiet, GETPC());
|
||||
}
|
||||
|
||||
void HELPER(gvec_vfche64_cc)(void *v1, const void *v2, const void *v3,
|
||||
CPUS390XState *env, uint32_t desc)
|
||||
{
|
||||
env->cc_op = vfc64(v1, v2, v3, env, false, float64_le_quiet, GETPC());
|
||||
}
|
||||
|
||||
void HELPER(gvec_vfche64s_cc)(void *v1, const void *v2, const void *v3,
|
||||
CPUS390XState *env, uint32_t desc)
|
||||
{
|
||||
env->cc_op = vfc64(v1, v2, v3, env, true, float64_le_quiet, GETPC());
|
||||
}
|
||||
DEF_GVEC_VFC(vfce, eq)
|
||||
DEF_GVEC_VFC(vfch, lt)
|
||||
DEF_GVEC_VFC(vfche, le)
|
||||
|
||||
static void vfll32(S390Vector *v1, const S390Vector *v2, CPUS390XState *env,
|
||||
bool s, uintptr_t retaddr)
|
||||
|
Loading…
Reference in New Issue
Block a user