Updates for the m68k ColdFire machines:

- Remove the obsolete dummy machine
 - QOMify the ColdFire interrupt controller
 - Volunteer for maintaining the orphan ColdFire boards
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Merge remote-tracking branch 'remotes/huth/tags/coldfire-20170219' into staging

Updates for the m68k ColdFire machines:
- Remove the obsolete dummy machine
- QOMify the ColdFire interrupt controller
- Volunteer for maintaining the orphan ColdFire boards

# gpg: Signature made Sat 18 Feb 2017 23:08:55 GMT
# gpg:                using RSA key 0x2ED9D774FE702DB5
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>"
# gpg:                 aka "Thomas Huth <thuth@redhat.com>"
# gpg:                 aka "Thomas Huth <huth@tuxfamily.org>"
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3  EAB9 2ED9 D774 FE70 2DB5

* remotes/huth/tags/coldfire-20170219:
  MAINTAINERS: Add odd fixer for the ColdFire boards
  hw/m68k: QOMify the ColdFire interrupt controller
  hw/m68k: Remove dummy machine

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell 2017-02-20 11:55:37 +00:00
commit 5d42ff913b
4 changed files with 50 additions and 97 deletions

View File

@ -561,20 +561,19 @@ F: hw/lm32/milkymist.c
M68K Machines
-------------
an5206
S: Orphan
M: Thomas Huth <huth@tuxfamily.org>
S: Odd Fixes
F: hw/m68k/an5206.c
F: hw/m68k/mcf5206.c
dummy_m68k
S: Orphan
F: hw/m68k/dummy_m68k.c
mcf5208
S: Orphan
M: Thomas Huth <huth@tuxfamily.org>
S: Odd Fixes
F: hw/m68k/mcf5208.c
F: hw/m68k/mcf_intc.c
F: hw/char/mcf_uart.c
F: hw/net/mcf_fec.c
F: include/hw/m68k/mcf*.h
MicroBlaze Machines
-------------------

View File

@ -1,4 +1,2 @@
obj-y += an5206.o mcf5208.o
obj-y += dummy_m68k.o
obj-y += mcf5206.o mcf_intc.o

View File

@ -1,84 +0,0 @@
/*
* Dummy board with just RAM and CPU for use as an ISS.
*
* Copyright (c) 2007 CodeSourcery.
*
* This code is licensed under the GPL
*/
#include "qemu/osdep.h"
#include "qemu-common.h"
#include "cpu.h"
#include "hw/hw.h"
#include "hw/boards.h"
#include "hw/loader.h"
#include "elf.h"
#include "exec/address-spaces.h"
#define KERNEL_LOAD_ADDR 0x10000
/* Board init. */
static void dummy_m68k_init(MachineState *machine)
{
ram_addr_t ram_size = machine->ram_size;
const char *cpu_model = machine->cpu_model;
const char *kernel_filename = machine->kernel_filename;
M68kCPU *cpu;
CPUM68KState *env;
MemoryRegion *address_space_mem = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1);
int kernel_size;
uint64_t elf_entry;
hwaddr entry;
if (!cpu_model)
cpu_model = "cfv4e";
cpu = cpu_m68k_init(cpu_model);
if (!cpu) {
fprintf(stderr, "Unable to find m68k CPU definition\n");
exit(1);
}
env = &cpu->env;
/* Initialize CPU registers. */
env->vbr = 0;
/* RAM at address zero */
memory_region_allocate_system_memory(ram, NULL, "dummy_m68k.ram",
ram_size);
memory_region_add_subregion(address_space_mem, 0, ram);
/* Load kernel. */
if (kernel_filename) {
kernel_size = load_elf(kernel_filename, NULL, NULL, &elf_entry,
NULL, NULL, 1, EM_68K, 0, 0);
entry = elf_entry;
if (kernel_size < 0) {
kernel_size = load_uimage(kernel_filename, &entry, NULL, NULL,
NULL, NULL);
}
if (kernel_size < 0) {
kernel_size = load_image_targphys(kernel_filename,
KERNEL_LOAD_ADDR,
ram_size - KERNEL_LOAD_ADDR);
entry = KERNEL_LOAD_ADDR;
}
if (kernel_size < 0) {
fprintf(stderr, "qemu: could not load kernel '%s'\n",
kernel_filename);
exit(1);
}
} else {
entry = 0;
}
env->pc = entry;
}
static void dummy_m68k_machine_init(MachineClass *mc)
{
mc->desc = "Dummy board";
mc->init = dummy_m68k_init;
}
DEFINE_MACHINE("dummy", dummy_m68k_machine_init)

View File

@ -9,10 +9,16 @@
#include "qemu-common.h"
#include "cpu.h"
#include "hw/hw.h"
#include "hw/sysbus.h"
#include "hw/m68k/mcf.h"
#include "exec/address-spaces.h"
#define TYPE_MCF_INTC "mcf-intc"
#define MCF_INTC(obj) OBJECT_CHECK(mcf_intc_state, (obj), TYPE_MCF_INTC)
typedef struct {
SysBusDevice parent_obj;
MemoryRegion iomem;
uint64_t ipr;
uint64_t imr;
@ -138,8 +144,10 @@ static void mcf_intc_set_irq(void *opaque, int irq, int level)
mcf_intc_update(s);
}
static void mcf_intc_reset(mcf_intc_state *s)
static void mcf_intc_reset(DeviceState *dev)
{
mcf_intc_state *s = MCF_INTC(dev);
s->imr = ~0ull;
s->ipr = 0;
s->ifr = 0;
@ -154,17 +162,49 @@ static const MemoryRegionOps mcf_intc_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
static void mcf_intc_instance_init(Object *obj)
{
mcf_intc_state *s = MCF_INTC(obj);
memory_region_init_io(&s->iomem, obj, &mcf_intc_ops, s, "mcf", 0x100);
}
static void mcf_intc_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
dc->reset = mcf_intc_reset;
}
static const TypeInfo mcf_intc_gate_info = {
.name = TYPE_MCF_INTC,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(mcf_intc_state),
.instance_init = mcf_intc_instance_init,
.class_init = mcf_intc_class_init,
};
static void mcf_intc_register_types(void)
{
type_register_static(&mcf_intc_gate_info);
}
type_init(mcf_intc_register_types)
qemu_irq *mcf_intc_init(MemoryRegion *sysmem,
hwaddr base,
M68kCPU *cpu)
{
DeviceState *dev;
mcf_intc_state *s;
s = g_malloc0(sizeof(mcf_intc_state));
s->cpu = cpu;
mcf_intc_reset(s);
dev = qdev_create(NULL, TYPE_MCF_INTC);
qdev_init_nofail(dev);
s = MCF_INTC(dev);
s->cpu = cpu;
memory_region_init_io(&s->iomem, NULL, &mcf_intc_ops, s, "mcf", 0x100);
memory_region_add_subregion(sysmem, base, &s->iomem);
return qemu_allocate_irqs(mcf_intc_set_irq, s, 64);