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hw/net/pcnet-pci: Convert away from old_mmio accessors
Convert the pcnet-pci device away from using the old_mmio MemoryRegionOps accessor functions. This commit is a no-behaviour-change API conversion. (Since PCNET_PNPMMIO_SIZE is 0x20, the old "addr & 0x10" check and the new "addr < 0x10" check are exact opposites; the new code is phrased to be parallel with the pcnet_io_read/write functions.) I have left a TODO comment marker because the similarity between the MMIO and IO accessor behaviour is suspicious and they could be combined, but this will be left to a different patch. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Peter Maydell
parent
b6e6c65151
commit
5d026de8b6
@ -139,92 +139,67 @@ static const MemoryRegionOps pcnet_io_ops = {
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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static void pcnet_mmio_writeb(void *opaque, hwaddr addr, uint32_t val)
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/*
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* TODO: should MMIO accesses to the addresses corresponding to the
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* APROM also honour the BCR_DWIO() setting? If so, then these functions
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* and pcnet_ioport_write/pcnet_ioport_read could be merged.
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* If not, then should pcnet_ioport_{read,write}{w,l} really check
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* BCR_DWIO() for MMIO writes ?
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*/
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static void pcnet_mmio_write(void *opaque, hwaddr addr, uint64_t value,
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unsigned size)
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{
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PCNetState *d = opaque;
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trace_pcnet_mmio_writeb(opaque, addr, val);
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if (!(addr & 0x10))
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pcnet_aprom_writeb(d, addr & 0x0f, val);
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}
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trace_pcnet_mmio_write(opaque, addr, size, val);
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static uint32_t pcnet_mmio_readb(void *opaque, hwaddr addr)
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{
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PCNetState *d = opaque;
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uint32_t val = -1;
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if (!(addr & 0x10))
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val = pcnet_aprom_readb(d, addr & 0x0f);
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trace_pcnet_mmio_readb(opaque, addr, val);
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return val;
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}
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static void pcnet_mmio_writew(void *opaque, hwaddr addr, uint32_t val)
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{
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PCNetState *d = opaque;
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trace_pcnet_mmio_writew(opaque, addr, val);
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if (addr & 0x10)
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pcnet_ioport_writew(d, addr & 0x0f, val);
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else {
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addr &= 0x0f;
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pcnet_aprom_writeb(d, addr, val & 0xff);
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pcnet_aprom_writeb(d, addr+1, (val & 0xff00) >> 8);
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if (addr < 0x10) {
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if (size == 1) {
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pcnet_aprom_writeb(d, addr, data);
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} else if ((addr & 1) == 0 && size == 2) {
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pcnet_aprom_writeb(d, addr, data & 0xff);
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pcnet_aprom_writeb(d, addr + 1, data >> 8);
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} else if ((addr & 3) == 0 && size == 4) {
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pcnet_aprom_writeb(d, addr, data & 0xff);
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pcnet_aprom_writeb(d, addr + 1, (data >> 8) & 0xff);
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pcnet_aprom_writeb(d, addr + 2, (data >> 16) & 0xff);
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pcnet_aprom_writeb(d, addr + 3, data >> 24);
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}
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} else {
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if (size == 2) {
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pcnet_ioport_writew(d, addr, data);
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} else if (size == 4) {
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pcnet_ioport_writel(d, addr, data);
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}
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}
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}
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static uint32_t pcnet_mmio_readw(void *opaque, hwaddr addr)
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{
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PCNetState *d = opaque;
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uint32_t val = -1;
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if (addr & 0x10)
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val = pcnet_ioport_readw(d, addr & 0x0f);
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else {
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addr &= 0x0f;
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val = pcnet_aprom_readb(d, addr+1);
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val <<= 8;
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val |= pcnet_aprom_readb(d, addr);
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}
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trace_pcnet_mmio_readw(opaque, addr, val);
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return val;
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}
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static void pcnet_mmio_writel(void *opaque, hwaddr addr, uint32_t val)
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static uint64_t pcnet_mmio_read(void *opque, hwaddr addr, unsigned size)
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{
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PCNetState *d = opaque;
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trace_pcnet_mmio_writel(opaque, addr, val);
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if (addr & 0x10)
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pcnet_ioport_writel(d, addr & 0x0f, val);
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else {
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addr &= 0x0f;
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pcnet_aprom_writeb(d, addr, val & 0xff);
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pcnet_aprom_writeb(d, addr+1, (val & 0xff00) >> 8);
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pcnet_aprom_writeb(d, addr+2, (val & 0xff0000) >> 16);
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pcnet_aprom_writeb(d, addr+3, (val & 0xff000000) >> 24);
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}
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}
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trace_pcnet_ioport_read(opaque, addr, size);
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static uint32_t pcnet_mmio_readl(void *opaque, hwaddr addr)
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{
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PCNetState *d = opaque;
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uint32_t val;
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if (addr & 0x10)
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val = pcnet_ioport_readl(d, addr & 0x0f);
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else {
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addr &= 0x0f;
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val = pcnet_aprom_readb(d, addr+3);
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val <<= 8;
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val |= pcnet_aprom_readb(d, addr+2);
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val <<= 8;
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val |= pcnet_aprom_readb(d, addr+1);
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val <<= 8;
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val |= pcnet_aprom_readb(d, addr);
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if (addr < 0x10) {
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if (size == 1) {
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return pcnet_aprom_readb(d, addr);
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} else if ((addr & 1) == 0 && size == 2) {
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return pcnet_aprom_readb(d, addr) |
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(pcnet_aprom_readb(d, addr + 1) << 8);
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} else if ((addr & 3) == 0 && size == 4) {
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return pcnet_aprom_readb(d, addr) |
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(pcnet_aprom_readb(d, addr + 1) << 8) |
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(pcnet_aprom_readb(d, addr + 2) << 16) |
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(pcnet_aprom_readb(d, addr + 3) << 24);
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}
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} else {
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if (size == 2) {
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return pcnet_ioport_readw(d, addr);
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} else if (size == 4) {
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return pcnet_ioport_readl(d, addr);
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}
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}
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trace_pcnet_mmio_readl(opaque, addr, val);
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return val;
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return ((uint64_t)1 << (size * 8)) - 1;
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}
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static const VMStateDescription vmstate_pci_pcnet = {
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@ -241,10 +216,12 @@ static const VMStateDescription vmstate_pci_pcnet = {
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/* PCI interface */
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static const MemoryRegionOps pcnet_mmio_ops = {
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.old_mmio = {
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.read = { pcnet_mmio_readb, pcnet_mmio_readw, pcnet_mmio_readl },
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.write = { pcnet_mmio_writeb, pcnet_mmio_writew, pcnet_mmio_writel },
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},
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.read = pcnet_mmio_read,
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.write = pcnet_mmio_write,
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.valid.min_access_size = 1,
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.valid.max_access_size = 4,
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.impl.min_access_size = 1,
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.impl.max_access_size = 4,
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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@ -61,12 +61,8 @@ pcnet_aprom_writeb(void *opaque, uint32_t addr, uint32_t val) "opaque=%p addr=0x
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pcnet_aprom_readb(void *opaque, uint32_t addr, uint32_t val) "opaque=%p addr=0x%08x val=0x%02x"
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pcnet_ioport_read(void *opaque, uint64_t addr, unsigned size) "opaque=%p addr=0x%"PRIx64" size=%d"
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pcnet_ioport_write(void *opaque, uint64_t addr, uint64_t data, unsigned size) "opaque=%p addr=0x%"PRIx64" data=0x%"PRIx64" size=%d"
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pcnet_mmio_writeb(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=0x%"PRIx64" val=0x%x"
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pcnet_mmio_writew(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=0x%"PRIx64" val=0x%x"
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pcnet_mmio_writel(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=0x%"PRIx64" val=0x%x"
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pcnet_mmio_readb(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=0x%"PRIx64" val=0x%x"
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pcnet_mmio_readw(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=0x%"PRIx64" val=0x%x"
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pcnet_mmio_readl(void *opaque, uint64_t addr, uint32_t val) "opaque=%p addr=0x%"PRIx64" val=0x%x"
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pcnet_mmio_write(void *opaque, uint64_t addr, uint32_t val, unsigned size) "opaque=%p addr=0x%"PRIx64" val=0x%x size=%d"
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pcnet_mmio_read(void *opaque, uint64_t addr, unsigned size) "opaque=%p addr=0x%"PRIx64" size=%d"
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# hw/net/net_rx_pkt.c
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net_rx_pkt_parsed(bool ip4, bool ip6, bool udp, bool tcp, size_t l3o, size_t l4o, size_t l5o) "RX packet parsed: ip4: %d, ip6: %d, udp: %d, tcp: %d, l3 offset: %zu, l4 offset: %zu, l5 offset: %zu"
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