mirror of
https://github.com/qemu/qemu.git
synced 2024-11-24 19:33:39 +08:00
target/i386: Convert to CPUClass::tlb_fill
We do not support probing, but we do not need it yet either. Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
parent
3c7bef03c5
commit
5d0044212c
@ -5915,9 +5915,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
|
||||
cc->gdb_write_register = x86_cpu_gdb_write_register;
|
||||
cc->get_arch_id = x86_cpu_get_arch_id;
|
||||
cc->get_paging_enabled = x86_cpu_get_paging_enabled;
|
||||
#ifdef CONFIG_USER_ONLY
|
||||
cc->handle_mmu_fault = x86_cpu_handle_mmu_fault;
|
||||
#else
|
||||
#ifndef CONFIG_USER_ONLY
|
||||
cc->asidx_from_attrs = x86_asidx_from_attrs;
|
||||
cc->get_memory_mapping = x86_cpu_get_memory_mapping;
|
||||
cc->get_phys_page_debug = x86_cpu_get_phys_page_debug;
|
||||
@ -5942,6 +5940,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
|
||||
cc->cpu_exec_exit = x86_cpu_exec_exit;
|
||||
#ifdef CONFIG_TCG
|
||||
cc->tcg_initialize = tcg_x86_init;
|
||||
cc->tlb_fill = x86_cpu_tlb_fill;
|
||||
#endif
|
||||
cc->disas_set_info = x86_disas_set_info;
|
||||
|
||||
|
@ -1656,8 +1656,9 @@ void host_cpuid(uint32_t function, uint32_t count,
|
||||
void host_vendor_fms(char *vendor, int *family, int *model, int *stepping);
|
||||
|
||||
/* helper.c */
|
||||
int x86_cpu_handle_mmu_fault(CPUState *cpu, vaddr addr, int size,
|
||||
int is_write, int mmu_idx);
|
||||
bool x86_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
|
||||
MMUAccessType access_type, int mmu_idx,
|
||||
bool probe, uintptr_t retaddr);
|
||||
void x86_cpu_set_a20(X86CPU *cpu, int a20_state);
|
||||
|
||||
#ifndef CONFIG_USER_ONLY
|
||||
|
@ -137,26 +137,7 @@ void raise_exception_ra(CPUX86State *env, int exception_index, uintptr_t retaddr
|
||||
raise_interrupt2(env, exception_index, 0, 0, 0, retaddr);
|
||||
}
|
||||
|
||||
#if defined(CONFIG_USER_ONLY)
|
||||
int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, int size,
|
||||
int is_write, int mmu_idx)
|
||||
{
|
||||
X86CPU *cpu = X86_CPU(cs);
|
||||
CPUX86State *env = &cpu->env;
|
||||
|
||||
/* user mode only emulation */
|
||||
is_write &= 1;
|
||||
env->cr[2] = addr;
|
||||
env->error_code = (is_write << PG_ERROR_W_BIT);
|
||||
env->error_code |= PG_ERROR_U_MASK;
|
||||
cs->exception_index = EXCP0E_PAGE;
|
||||
env->exception_is_int = 0;
|
||||
env->exception_next_eip = -1;
|
||||
return 1;
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
#if !defined(CONFIG_USER_ONLY)
|
||||
static hwaddr get_hphys(CPUState *cs, hwaddr gphys, MMUAccessType access_type,
|
||||
int *prot)
|
||||
{
|
||||
@ -365,8 +346,8 @@ static hwaddr get_hphys(CPUState *cs, hwaddr gphys, MMUAccessType access_type,
|
||||
* 0 = nothing more to do
|
||||
* 1 = generate PF fault
|
||||
*/
|
||||
int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, int size,
|
||||
int is_write1, int mmu_idx)
|
||||
static int handle_mmu_fault(CPUState *cs, vaddr addr, int size,
|
||||
int is_write1, int mmu_idx)
|
||||
{
|
||||
X86CPU *cpu = X86_CPU(cs);
|
||||
CPUX86State *env = &cpu->env;
|
||||
@ -691,3 +672,39 @@ do_check_protect_pse36:
|
||||
return 1;
|
||||
}
|
||||
#endif
|
||||
|
||||
bool x86_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
|
||||
MMUAccessType access_type, int mmu_idx,
|
||||
bool probe, uintptr_t retaddr)
|
||||
{
|
||||
X86CPU *cpu = X86_CPU(cs);
|
||||
CPUX86State *env = &cpu->env;
|
||||
|
||||
#ifdef CONFIG_USER_ONLY
|
||||
/* user mode only emulation */
|
||||
env->cr[2] = addr;
|
||||
env->error_code = (access_type == MMU_DATA_STORE) << PG_ERROR_W_BIT;
|
||||
env->error_code |= PG_ERROR_U_MASK;
|
||||
cs->exception_index = EXCP0E_PAGE;
|
||||
env->exception_is_int = 0;
|
||||
env->exception_next_eip = -1;
|
||||
cpu_loop_exit_restore(cs, retaddr);
|
||||
#else
|
||||
env->retaddr = retaddr;
|
||||
if (handle_mmu_fault(cs, addr, size, access_type, mmu_idx)) {
|
||||
/* FIXME: On error in get_hphys we have already jumped out. */
|
||||
g_assert(!probe);
|
||||
raise_exception_err_ra(env, cs->exception_index,
|
||||
env->error_code, retaddr);
|
||||
}
|
||||
return true;
|
||||
#endif
|
||||
}
|
||||
|
||||
#if !defined(CONFIG_USER_ONLY)
|
||||
void tlb_fill(CPUState *cs, target_ulong addr, int size,
|
||||
MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
|
||||
{
|
||||
x86_cpu_tlb_fill(cs, addr, size, access_type, mmu_idx, false, retaddr);
|
||||
}
|
||||
#endif
|
||||
|
@ -191,24 +191,3 @@ void helper_boundl(CPUX86State *env, target_ulong a0, int v)
|
||||
raise_exception_ra(env, EXCP05_BOUND, GETPC());
|
||||
}
|
||||
}
|
||||
|
||||
#if !defined(CONFIG_USER_ONLY)
|
||||
/* try to fill the TLB and return an exception if error. If retaddr is
|
||||
* NULL, it means that the function was called in C code (i.e. not
|
||||
* from generated code or from helper.c)
|
||||
*/
|
||||
/* XXX: fix it to restore all registers */
|
||||
void tlb_fill(CPUState *cs, target_ulong addr, int size,
|
||||
MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
|
||||
{
|
||||
X86CPU *cpu = X86_CPU(cs);
|
||||
CPUX86State *env = &cpu->env;
|
||||
int ret;
|
||||
|
||||
env->retaddr = retaddr;
|
||||
ret = x86_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx);
|
||||
if (ret) {
|
||||
raise_exception_err_ra(env, cs->exception_index, env->error_code, retaddr);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
|
Loading…
Reference in New Issue
Block a user