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hw/arm/pxa2xx: Replace hw_error() by qemu_log_mask()
hw_error() calls exit(). This a bit overkill when we can log the accesses as unimplemented or guest error. When fuzzing the devices, we don't want the whole process to exit. Replace some hw_error() calls by qemu_log_mask(). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20200518140309.5220-3-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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@ -9,7 +9,6 @@
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "hw/hw.h"
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#include "hw/irq.h"
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#include "hw/qdev-properties.h"
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#include "hw/sysbus.h"
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@ -199,7 +198,8 @@ static uint64_t pxa2xx_gpio_read(void *opaque, hwaddr offset,
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return s->status[bank];
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default:
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hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset);
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
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__func__, offset);
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}
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return 0;
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@ -252,7 +252,8 @@ static void pxa2xx_gpio_write(void *opaque, hwaddr offset,
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break;
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default:
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hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset);
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
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__func__, offset);
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}
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}
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@ -11,7 +11,7 @@
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*/
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#include "qemu/osdep.h"
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#include "hw/hw.h"
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#include "qemu/log.h"
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#include "hw/irq.h"
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#include "migration/vmstate.h"
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#include "ui/console.h"
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@ -407,7 +407,8 @@ static uint64_t pxa2xx_lcdc_read(void *opaque, hwaddr offset,
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default:
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fail:
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hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset);
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
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__func__, offset);
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}
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return 0;
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@ -562,7 +563,8 @@ static void pxa2xx_lcdc_write(void *opaque, hwaddr offset,
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default:
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fail:
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hw_error("%s: Bad offset " REG_FMT "\n", __func__, offset);
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
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__func__, offset);
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}
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}
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@ -9,6 +9,7 @@
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*/
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#include "qemu/osdep.h"
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#include "qemu/log.h"
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#include "hw/hw.h"
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#include "hw/irq.h"
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#include "hw/qdev-properties.h"
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@ -268,7 +269,8 @@ static uint64_t pxa2xx_dma_read(void *opaque, hwaddr offset,
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unsigned int channel;
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if (size != 4) {
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hw_error("%s: Bad access width\n", __func__);
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad access width %u\n",
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__func__, size);
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return 5;
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}
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@ -315,8 +317,8 @@ static uint64_t pxa2xx_dma_read(void *opaque, hwaddr offset,
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return s->chan[channel].cmd;
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}
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}
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hw_error("%s: Bad offset 0x" TARGET_FMT_plx "\n", __func__, offset);
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
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__func__, offset);
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return 7;
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}
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@ -327,7 +329,8 @@ static void pxa2xx_dma_write(void *opaque, hwaddr offset,
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unsigned int channel;
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if (size != 4) {
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hw_error("%s: Bad access width\n", __func__);
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad access width %u\n",
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__func__, size);
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return;
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}
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@ -420,7 +423,8 @@ static void pxa2xx_dma_write(void *opaque, hwaddr offset,
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break;
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}
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fail:
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hw_error("%s: Bad offset " TARGET_FMT_plx "\n", __func__, offset);
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qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%" HWADDR_PRIX "\n",
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__func__, offset);
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}
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}
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