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sparc64: fix 128-bit atomic load from nucleus context v1
- change 128-bit atomic loads to reference nucleus context v0->v1: dropped disassembler change Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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@ -3060,19 +3060,19 @@ void helper_ldda_asi(target_ulong addr, int asi, int rd)
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case 0x2c: // Nucleus quad LDD 128 bit atomic LE
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helper_check_align(addr, 0xf);
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if (rd == 0) {
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env->gregs[1] = ldq_kernel(addr + 8);
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env->gregs[1] = ldq_nucleus(addr + 8);
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if (asi == 0x2c)
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bswap64s(&env->gregs[1]);
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} else if (rd < 8) {
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env->gregs[rd] = ldq_kernel(addr);
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env->gregs[rd + 1] = ldq_kernel(addr + 8);
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env->gregs[rd] = ldq_nucleus(addr);
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env->gregs[rd + 1] = ldq_nucleus(addr + 8);
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if (asi == 0x2c) {
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bswap64s(&env->gregs[rd]);
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bswap64s(&env->gregs[rd + 1]);
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}
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} else {
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env->regwptr[rd] = ldq_kernel(addr);
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env->regwptr[rd + 1] = ldq_kernel(addr + 8);
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env->regwptr[rd] = ldq_nucleus(addr);
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env->regwptr[rd + 1] = ldq_nucleus(addr + 8);
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if (asi == 0x2c) {
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bswap64s(&env->regwptr[rd]);
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bswap64s(&env->regwptr[rd + 1]);
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