target-mips: fix incorrect behaviour for EXTP

The mask for EXTP instruction when size=31 has not been correctly
calculated.

The test (mips32-dsp/extp.c) has been extended to include the case that
triggers the issue.

Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit is contained in:
Petar Jovanovic 2013-05-13 15:20:26 +02:00 committed by Aurelien Jarno
parent 91b96cdc5b
commit 489ed4bbae
2 changed files with 19 additions and 2 deletions

View File

@ -3415,8 +3415,7 @@ target_ulong helper_extp(target_ulong ac, target_ulong size, CPUMIPSState *env)
if (sub >= -1) {
acc = ((uint64_t)env->active_tc.HI[ac] << 32) |
((uint64_t)env->active_tc.LO[ac] & MIPSDSP_LLO);
temp = (acc >> (start_pos - size)) &
(((uint32_t)0x01 << (size + 1)) - 1);
temp = (acc >> (start_pos - size)) & (~0U >> (31 - size));
set_DSPControl_efi(0, env);
} else {
set_DSPControl_efi(1, env);

View File

@ -40,5 +40,23 @@ int main()
dsp = (dsp >> 14) & 0x01;
assert(dsp == 1);
ach = 0;
acl = 0x80000001;
dsp = 0x1F;
result = 0x80000001;
__asm
("wrdsp %1\n\t"
"mthi %2, $ac2\n\t"
"mtlo %3, $ac2\n\t"
"extp %0, $ac2, 0x1F\n\t"
"rddsp %1\n\t"
: "=r"(rt), "+r"(dsp)
: "r"(ach), "r"(acl)
);
dsp = (dsp >> 14) & 0x01;
assert(dsp == 0);
assert(result == rt);
return 0;
}