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Hexagon (target/hexagon) instruction classes
Determine legal VLIW slots for each instruction Signed-off-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <1612763186-18161-26-git-send-email-tsimpson@quicinc.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Taylor Simpson
Richard Henderson
parent
a646e99cb9
commit
471d4b2dc6
73
target/hexagon/iclass.c
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73
target/hexagon/iclass.c
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/*
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* Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "iclass.h"
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static const SlotMask iclass_info[] = {
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#define DEF_PP_ICLASS32(TYPE, SLOTS, UNITS) \
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[ICLASS_FROM_TYPE(TYPE)] = SLOTS_##SLOTS,
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#define DEF_EE_ICLASS32(TYPE, SLOTS, UNITS) \
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[ICLASS_FROM_TYPE(TYPE)] = SLOTS_##SLOTS,
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#include "imported/iclass.def"
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#undef DEF_PP_ICLASS32
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#undef DEF_EE_ICLASS32
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};
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SlotMask find_iclass_slots(Opcode opcode, int itype)
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{
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/* There are some exceptions to what the iclass dictates */
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if (GET_ATTRIB(opcode, A_ICOP)) {
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return SLOTS_2;
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} else if (GET_ATTRIB(opcode, A_RESTRICT_SLOT0ONLY)) {
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return SLOTS_0;
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} else if (GET_ATTRIB(opcode, A_RESTRICT_SLOT1ONLY)) {
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return SLOTS_1;
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} else if (GET_ATTRIB(opcode, A_RESTRICT_SLOT2ONLY)) {
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return SLOTS_2;
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} else if (GET_ATTRIB(opcode, A_RESTRICT_SLOT3ONLY)) {
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return SLOTS_3;
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} else if (GET_ATTRIB(opcode, A_COF) &&
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GET_ATTRIB(opcode, A_INDIRECT) &&
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!GET_ATTRIB(opcode, A_MEMLIKE) &&
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!GET_ATTRIB(opcode, A_MEMLIKE_PACKET_RULES)) {
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return SLOTS_2;
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} else if (GET_ATTRIB(opcode, A_RESTRICT_NOSLOT1)) {
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return SLOTS_0;
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} else if ((opcode == J2_trap0) ||
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(opcode == Y2_isync) ||
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(opcode == J2_pause) || (opcode == J4_hintjumpr)) {
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return SLOTS_2;
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} else if ((itype == ICLASS_V2LDST) && (GET_ATTRIB(opcode, A_STORE))) {
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return SLOTS_01;
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} else if ((itype == ICLASS_V2LDST) && (!GET_ATTRIB(opcode, A_STORE))) {
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return SLOTS_01;
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} else if (GET_ATTRIB(opcode, A_CRSLOT23)) {
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return SLOTS_23;
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} else if (GET_ATTRIB(opcode, A_RESTRICT_PREFERSLOT0)) {
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return SLOTS_0;
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} else if (GET_ATTRIB(opcode, A_SUBINSN)) {
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return SLOTS_01;
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} else if (GET_ATTRIB(opcode, A_CALL)) {
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return SLOTS_23;
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} else if ((opcode == J4_jumpseti) || (opcode == J4_jumpsetr)) {
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return SLOTS_23;
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} else {
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return iclass_info[itype];
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}
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}
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50
target/hexagon/iclass.h
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50
target/hexagon/iclass.h
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@ -0,0 +1,50 @@
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/*
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* Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef HEXAGON_ICLASS_H
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#define HEXAGON_ICLASS_H
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#include "attribs.h"
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#define ICLASS_FROM_TYPE(TYPE) ICLASS_##TYPE
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enum {
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#define DEF_PP_ICLASS32(TYPE, SLOTS, UNITS) ICLASS_FROM_TYPE(TYPE),
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#define DEF_EE_ICLASS32(TYPE, SLOTS, UNITS) ICLASS_FROM_TYPE(TYPE),
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#include "imported/iclass.def"
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#undef DEF_PP_ICLASS32
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#undef DEF_EE_ICLASS32
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ICLASS_FROM_TYPE(COPROC_VX),
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ICLASS_FROM_TYPE(COPROC_VMEM),
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NUM_ICLASSES
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};
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typedef enum {
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SLOTS_0 = (1 << 0),
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SLOTS_1 = (1 << 1),
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SLOTS_2 = (1 << 2),
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SLOTS_3 = (1 << 3),
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SLOTS_01 = SLOTS_0 | SLOTS_1,
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SLOTS_23 = SLOTS_2 | SLOTS_3,
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SLOTS_0123 = SLOTS_0 | SLOTS_1 | SLOTS_2 | SLOTS_3,
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} SlotMask;
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SlotMask find_iclass_slots(Opcode opcode, int itype);
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#endif
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51
target/hexagon/imported/iclass.def
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51
target/hexagon/imported/iclass.def
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/*
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* Copyright(c) 2019-2021 Qualcomm Innovation Center, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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/* DEF_*(TYPE,SLOTS,UNITS) */
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DEF_PP_ICLASS32(EXTENDER,0123,LDST|SUNIT|MUNIT) /* 0 */
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DEF_PP_ICLASS32(CJ,0123,CTRLFLOW) /* 1 */
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DEF_PP_ICLASS32(NCJ,01,LDST|CTRLFLOW) /* 2 */
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DEF_PP_ICLASS32(V4LDST,01,LDST) /* 3 */
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DEF_PP_ICLASS32(V2LDST,01,LDST) /* 4 */
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DEF_PP_ICLASS32(J,0123,CTRLFLOW) /* 5 */
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DEF_PP_ICLASS32(CR,3,SUNIT) /* 6 */
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DEF_PP_ICLASS32(ALU32_2op,0123,LDST|SUNIT|MUNIT) /* 7 */
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DEF_PP_ICLASS32(S_2op,23,SUNIT|MUNIT) /* 8 */
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DEF_PP_ICLASS32(LD,01,LDST) /* 9 */
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DEF_PP_ICLASS32(ST,01,LDST) /* 10 */
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DEF_PP_ICLASS32(ALU32_ADDI,0123,LDST|SUNIT|MUNIT) /* 11 */
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DEF_PP_ICLASS32(S_3op,23,SUNIT|MUNIT) /* 12 */
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DEF_PP_ICLASS32(ALU64,23,SUNIT|MUNIT) /* 13 */
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DEF_PP_ICLASS32(M,23,SUNIT|MUNIT) /* 14 */
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DEF_PP_ICLASS32(ALU32_3op,0123,LDST|SUNIT|MUNIT) /* 15 */
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DEF_EE_ICLASS32(EE0,01,INVALID) /* 0 */
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DEF_EE_ICLASS32(EE1,01,INVALID) /* 1 */
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DEF_EE_ICLASS32(EE2,01,INVALID) /* 2 */
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DEF_EE_ICLASS32(EE3,01,INVALID) /* 3 */
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DEF_EE_ICLASS32(EE4,01,INVALID) /* 4 */
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DEF_EE_ICLASS32(EE5,01,INVALID) /* 5 */
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DEF_EE_ICLASS32(EE6,01,INVALID) /* 6 */
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DEF_EE_ICLASS32(EE7,01,INVALID) /* 7 */
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DEF_EE_ICLASS32(EE8,01,INVALID) /* 8 */
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DEF_EE_ICLASS32(EE9,01,INVALID) /* 9 */
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DEF_EE_ICLASS32(EEA,01,INVALID) /* 10 */
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DEF_EE_ICLASS32(EEB,01,INVALID) /* 11 */
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DEF_EE_ICLASS32(EEC,01,INVALID) /* 12 */
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DEF_EE_ICLASS32(EED,01,INVALID) /* 13 */
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DEF_EE_ICLASS32(EEE,01,INVALID) /* 14 */
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DEF_EE_ICLASS32(EEF,01,INVALID) /* 15 */
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