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ac97: symbolic names for pci registers
No functional changes. I verified that the generated binary does not change. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Juan Quintela <quintela@redhat.com> Acked-by: Glauber Costa <glommer@gmail.com>
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parent
fcce95e2ee
commit
4468fb6343
49
hw/ac97.c
49
hw/ac97.c
@ -1284,37 +1284,42 @@ static int ac97_initfn (PCIDevice *dev)
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pci_config_set_vendor_id (c, PCI_VENDOR_ID_INTEL); /* ro */
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pci_config_set_vendor_id (c, PCI_VENDOR_ID_INTEL); /* ro */
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pci_config_set_device_id (c, PCI_DEVICE_ID_INTEL_82801AA_5); /* ro */
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pci_config_set_device_id (c, PCI_DEVICE_ID_INTEL_82801AA_5); /* ro */
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c[0x04] = 0x00; /* pcicmd pci command rw, ro */
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/* TODO: no need to override */
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c[0x05] = 0x00;
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c[PCI_COMMAND] = 0x00; /* pcicmd pci command rw, ro */
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c[PCI_COMMAND + 1] = 0x00;
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c[0x06] = 0x80; /* pcists pci status rwc, ro */
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/* TODO: */
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c[0x07] = 0x02;
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c[PCI_STATUS] = PCI_STATUS_FAST_BACK; /* pcists pci status rwc, ro */
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c[PCI_STATUS + 1] = PCI_STATUS_DEVSEL_MEDIUM >> 8;
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c[0x08] = 0x01; /* rid revision ro */
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c[PCI_REVISION_ID] = 0x01; /* rid revision ro */
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c[0x09] = 0x00; /* pi programming interface ro */
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c[PCI_CLASS_PROG] = 0x00; /* pi programming interface ro */
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pci_config_set_class (c, PCI_CLASS_MULTIMEDIA_AUDIO); /* ro */
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pci_config_set_class (c, PCI_CLASS_MULTIMEDIA_AUDIO); /* ro */
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c[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; /* headtyp header type ro */
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c[PCI_HEADER_TYPE] = PCI_HEADER_TYPE_NORMAL; /* headtyp header type ro */
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c[0x10] = 0x01; /* nabmar native audio mixer base
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/* TODO set when bar is registered. no need to override. */
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address rw */
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/* nabmar native audio mixer base address rw */
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c[0x11] = 0x00;
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c[PCI_BASE_ADDRESS_0] = PCI_BASE_ADDRESS_SPACE_IO;
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c[0x12] = 0x00;
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c[PCI_BASE_ADDRESS_0 + 1] = 0x00;
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c[0x13] = 0x00;
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c[PCI_BASE_ADDRESS_0 + 2] = 0x00;
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c[PCI_BASE_ADDRESS_0 + 3] = 0x00;
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c[0x14] = 0x01; /* nabmbar native audio bus mastering
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/* TODO set when bar is registered. no need to override. */
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base address rw */
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/* nabmbar native audio bus mastering base address rw */
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c[0x15] = 0x00;
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c[PCI_BASE_ADDRESS_0 + 4] = PCI_BASE_ADDRESS_SPACE_IO;
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c[0x16] = 0x00;
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c[PCI_BASE_ADDRESS_0 + 5] = 0x00;
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c[0x17] = 0x00;
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c[PCI_BASE_ADDRESS_0 + 6] = 0x00;
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c[PCI_BASE_ADDRESS_0 + 7] = 0x00;
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c[0x2c] = 0x86; /* svid subsystem vendor id rwo */
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c[PCI_SUBSYSTEM_VENDOR_ID] = 0x86; /* svid subsystem vendor id rwo */
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c[0x2d] = 0x80;
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c[PCI_SUBSYSTEM_VENDOR_ID + 1] = 0x80;
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c[0x2e] = 0x00; /* sid subsystem id rwo */
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c[PCI_SUBSYSTEM_ID] = 0x00; /* sid subsystem id rwo */
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c[0x2f] = 0x00;
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c[PCI_SUBSYSTEM_ID + 1] = 0x00;
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c[0x3c] = 0x00; /* intr_ln interrupt line rw */
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c[PCI_INTERRUPT_LINE] = 0x00; /* intr_ln interrupt line rw */
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c[0x3d] = 0x01; /* intr_pn interrupt pin ro */
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/* TODO: RST# value should be 0. */
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c[PCI_INTERRUPT_PIN] = 0x01; /* intr_pn interrupt pin ro */
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pci_register_bar (&s->dev, 0, 256 * 4, PCI_BASE_ADDRESS_SPACE_IO,
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pci_register_bar (&s->dev, 0, 256 * 4, PCI_BASE_ADDRESS_SPACE_IO,
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ac97_map);
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ac97_map);
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