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tcg/s390x: Implement TCG_TARGET_HAS_sat_vec
The unsigned saturations are handled via generic code using min/max. The signed saturations are expanded using double-sized arithmetic and a saturating pack. Since all operations are done via expansion, do not actually set TCG_TARGET_HAS_sat_vec. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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@ -291,7 +291,10 @@ typedef enum S390Opcode {
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VRRc_VNO = 0xe76b,
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VRRc_VO = 0xe76a,
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VRRc_VOC = 0xe76f,
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VRRc_VPKS = 0xe797, /* we leave the m5 cs field 0 */
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VRRc_VS = 0xe7f7,
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VRRa_VUPH = 0xe7d7,
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VRRa_VUPL = 0xe7d6,
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VRRc_VX = 0xe76d,
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VRRf_VLVGP = 0xe762,
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@ -2800,6 +2803,16 @@ static void tcg_out_vec_op(TCGContext *s, TCGOpcode opc,
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}
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break;
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case INDEX_op_s390_vuph_vec:
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tcg_out_insn(s, VRRa, VUPH, a0, a1, vece);
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break;
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case INDEX_op_s390_vupl_vec:
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tcg_out_insn(s, VRRa, VUPL, a0, a1, vece);
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break;
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case INDEX_op_s390_vpks_vec:
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tcg_out_insn(s, VRRc, VPKS, a0, a1, a2, vece);
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break;
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case INDEX_op_mov_vec: /* Always emitted via tcg_out_mov. */
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case INDEX_op_dup_vec: /* Always emitted via tcg_out_dup_vec. */
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default:
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@ -2842,6 +2855,9 @@ int tcg_can_emit_vec_op(TCGOpcode opc, TCGType type, unsigned vece)
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return -1;
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case INDEX_op_mul_vec:
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return vece < MO_64;
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case INDEX_op_ssadd_vec:
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case INDEX_op_sssub_vec:
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return vece < MO_64 ? -1 : 0;
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default:
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return 0;
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}
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@ -2897,6 +2913,43 @@ static void expand_vec_cmp(TCGType type, unsigned vece, TCGv_vec v0,
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}
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}
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static void expand_vec_sat(TCGType type, unsigned vece, TCGv_vec v0,
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TCGv_vec v1, TCGv_vec v2, TCGOpcode add_sub_opc)
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{
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TCGv_vec h1 = tcg_temp_new_vec(type);
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TCGv_vec h2 = tcg_temp_new_vec(type);
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TCGv_vec l1 = tcg_temp_new_vec(type);
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TCGv_vec l2 = tcg_temp_new_vec(type);
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tcg_debug_assert (vece < MO_64);
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/* Unpack with sign-extension. */
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vec_gen_2(INDEX_op_s390_vuph_vec, type, vece,
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tcgv_vec_arg(h1), tcgv_vec_arg(v1));
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vec_gen_2(INDEX_op_s390_vuph_vec, type, vece,
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tcgv_vec_arg(h2), tcgv_vec_arg(v2));
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vec_gen_2(INDEX_op_s390_vupl_vec, type, vece,
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tcgv_vec_arg(l1), tcgv_vec_arg(v1));
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vec_gen_2(INDEX_op_s390_vupl_vec, type, vece,
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tcgv_vec_arg(l2), tcgv_vec_arg(v2));
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/* Arithmetic on a wider element size. */
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vec_gen_3(add_sub_opc, type, vece + 1, tcgv_vec_arg(h1),
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tcgv_vec_arg(h1), tcgv_vec_arg(h2));
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vec_gen_3(add_sub_opc, type, vece + 1, tcgv_vec_arg(l1),
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tcgv_vec_arg(l1), tcgv_vec_arg(l2));
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/* Pack with saturation. */
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vec_gen_3(INDEX_op_s390_vpks_vec, type, vece + 1,
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tcgv_vec_arg(v0), tcgv_vec_arg(h1), tcgv_vec_arg(l1));
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tcg_temp_free_vec(h1);
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tcg_temp_free_vec(h2);
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tcg_temp_free_vec(l1);
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tcg_temp_free_vec(l2);
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}
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void tcg_expand_vec_op(TCGOpcode opc, TCGType type, unsigned vece,
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TCGArg a0, ...)
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{
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@ -2920,6 +2973,13 @@ void tcg_expand_vec_op(TCGOpcode opc, TCGType type, unsigned vece,
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tcg_temp_free_vec(t0);
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break;
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case INDEX_op_ssadd_vec:
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expand_vec_sat(type, vece, v0, v1, v2, INDEX_op_add_vec);
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break;
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case INDEX_op_sssub_vec:
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expand_vec_sat(type, vece, v0, v1, v2, INDEX_op_sub_vec);
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break;
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default:
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g_assert_not_reached();
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}
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@ -3080,6 +3140,8 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
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case INDEX_op_sari_vec:
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case INDEX_op_shli_vec:
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case INDEX_op_shri_vec:
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case INDEX_op_s390_vuph_vec:
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case INDEX_op_s390_vupl_vec:
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return C_O1_I1(v, v);
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case INDEX_op_add_vec:
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case INDEX_op_sub_vec:
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@ -3099,6 +3161,7 @@ static TCGConstraintSetIndex tcg_target_op_def(TCGOpcode op)
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case INDEX_op_smin_vec:
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case INDEX_op_umax_vec:
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case INDEX_op_umin_vec:
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case INDEX_op_s390_vpks_vec:
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return C_O1_I2(v, v, v);
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case INDEX_op_rotls_vec:
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case INDEX_op_shls_vec:
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@ -10,3 +10,6 @@
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* emitted by tcg_expand_vec_op. For those familiar with GCC internals,
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* consider these to be UNSPEC with names.
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*/
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DEF(s390_vuph_vec, 1, 1, 0, IMPLVEC)
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DEF(s390_vupl_vec, 1, 1, 0, IMPLVEC)
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DEF(s390_vpks_vec, 1, 2, 0, IMPLVEC)
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