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https://github.com/qemu/qemu.git
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pc: acpi: merge SSDT into DSDT
Since both tables are built dynamically now, there is no point in keeping ASL in them in separate tables. So do the same as we do for ARM where we have only DSDT table, i.e. move SSDT ASL into DSDT and drop SSDT altogether. This patch doesn't change moved SSDT ASL in any way, but it opens a way to relatively independently simplify generated ASL on per device/subsystem basis in followup series. It also simplifies bios-tables-test where expected SSDT blobs could be dropped and only DSDT ones have to be maintained. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
This commit is contained in:
Igor Mammedov
Michael S. Tsirkin
parent
3e996cc583
commit
41fa5c0410
@ -1935,24 +1935,113 @@ static Aml *build_q35_osc_method(void)
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}
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static void
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build_ssdt(GArray *table_data, GArray *linker,
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build_dsdt(GArray *table_data, GArray *linker,
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AcpiCpuInfo *cpu, AcpiPmInfo *pm, AcpiMiscInfo *misc,
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PcPciInfo *pci, PcGuestInfo *guest_info)
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{
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CrsRangeEntry *entry;
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Aml *dsdt, *sb_scope, *scope, *dev, *method, *field, *pkg, *crs;
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GPtrArray *mem_ranges = g_ptr_array_new_with_free_func(crs_range_free);
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GPtrArray *io_ranges = g_ptr_array_new_with_free_func(crs_range_free);
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MachineState *machine = MACHINE(qdev_get_machine());
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uint32_t nr_mem = machine->ram_slots;
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Aml *ssdt, *sb_scope, *scope, *pkg, *dev, *method, *crs, *field;
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PCIBus *bus = NULL;
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GPtrArray *io_ranges = g_ptr_array_new_with_free_func(crs_range_free);
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GPtrArray *mem_ranges = g_ptr_array_new_with_free_func(crs_range_free);
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CrsRangeEntry *entry;
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int root_bus_limit = 0xFF;
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PCIBus *bus = NULL;
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int i;
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ssdt = init_aml_allocator();
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dsdt = init_aml_allocator();
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/* Reserve space for header */
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acpi_data_push(ssdt->buf, sizeof(AcpiTableHeader));
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acpi_data_push(dsdt->buf, sizeof(AcpiTableHeader));
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build_dbg_aml(dsdt);
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if (misc->is_piix4) {
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sb_scope = aml_scope("_SB");
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dev = aml_device("PCI0");
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aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A03")));
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aml_append(dev, aml_name_decl("_ADR", aml_int(0)));
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aml_append(dev, aml_name_decl("_UID", aml_int(1)));
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aml_append(sb_scope, dev);
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aml_append(dsdt, sb_scope);
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build_hpet_aml(dsdt);
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build_piix4_pm(dsdt);
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build_piix4_isa_bridge(dsdt);
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build_isa_devices_aml(dsdt);
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build_piix4_pci_hotplug(dsdt);
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build_piix4_pci0_int(dsdt);
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} else {
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sb_scope = aml_scope("_SB");
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aml_append(sb_scope,
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aml_operation_region("PCST", AML_SYSTEM_IO, 0xae00, 0x0c));
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aml_append(sb_scope,
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aml_operation_region("PCSB", AML_SYSTEM_IO, 0xae0c, 0x01));
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field = aml_field("PCSB", AML_ANY_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
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aml_append(field, aml_named_field("PCIB", 8));
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aml_append(sb_scope, field);
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aml_append(dsdt, sb_scope);
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sb_scope = aml_scope("_SB");
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dev = aml_device("PCI0");
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aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A08")));
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aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03")));
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aml_append(dev, aml_name_decl("_ADR", aml_int(0)));
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aml_append(dev, aml_name_decl("_UID", aml_int(1)));
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aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
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aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
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aml_append(dev, build_q35_osc_method());
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aml_append(sb_scope, dev);
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aml_append(dsdt, sb_scope);
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build_hpet_aml(dsdt);
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build_q35_isa_bridge(dsdt);
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build_isa_devices_aml(dsdt);
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build_q35_pci0_int(dsdt);
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}
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build_cpu_hotplug_aml(dsdt);
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build_memory_hotplug_aml(dsdt, nr_mem, pm->mem_hp_io_base,
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pm->mem_hp_io_len);
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scope = aml_scope("_GPE");
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{
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aml_append(scope, aml_name_decl("_HID", aml_string("ACPI0006")));
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aml_append(scope, aml_method("_L00", 0, AML_NOTSERIALIZED));
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if (misc->is_piix4) {
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method = aml_method("_E01", 0, AML_NOTSERIALIZED);
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aml_append(method,
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aml_acquire(aml_name("\\_SB.PCI0.BLCK"), 0xFFFF));
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aml_append(method, aml_call0("\\_SB.PCI0.PCNT"));
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aml_append(method, aml_release(aml_name("\\_SB.PCI0.BLCK")));
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aml_append(scope, method);
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} else {
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aml_append(scope, aml_method("_L01", 0, AML_NOTSERIALIZED));
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}
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method = aml_method("_E02", 0, AML_NOTSERIALIZED);
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aml_append(method, aml_call0("\\_SB." CPU_SCAN_METHOD));
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aml_append(scope, method);
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method = aml_method("_E03", 0, AML_NOTSERIALIZED);
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aml_append(method, aml_call0(MEMORY_HOTPLUG_HANDLER_PATH));
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aml_append(scope, method);
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aml_append(scope, aml_method("_L04", 0, AML_NOTSERIALIZED));
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aml_append(scope, aml_method("_L05", 0, AML_NOTSERIALIZED));
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aml_append(scope, aml_method("_L06", 0, AML_NOTSERIALIZED));
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aml_append(scope, aml_method("_L07", 0, AML_NOTSERIALIZED));
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aml_append(scope, aml_method("_L08", 0, AML_NOTSERIALIZED));
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aml_append(scope, aml_method("_L09", 0, AML_NOTSERIALIZED));
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aml_append(scope, aml_method("_L0A", 0, AML_NOTSERIALIZED));
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aml_append(scope, aml_method("_L0B", 0, AML_NOTSERIALIZED));
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aml_append(scope, aml_method("_L0C", 0, AML_NOTSERIALIZED));
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aml_append(scope, aml_method("_L0D", 0, AML_NOTSERIALIZED));
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aml_append(scope, aml_method("_L0E", 0, AML_NOTSERIALIZED));
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aml_append(scope, aml_method("_L0F", 0, AML_NOTSERIALIZED));
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}
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aml_append(dsdt, scope);
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bus = PC_MACHINE(machine)->bus;
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if (bus) {
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@ -1984,7 +2073,7 @@ build_ssdt(GArray *table_data, GArray *linker,
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io_ranges, mem_ranges);
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aml_append(dev, aml_name_decl("_CRS", crs));
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aml_append(scope, dev);
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aml_append(ssdt, scope);
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aml_append(dsdt, scope);
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}
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}
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@ -2068,7 +2157,7 @@ build_ssdt(GArray *table_data, GArray *linker,
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aml_append(dev, aml_name_decl("_CRS", crs));
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aml_append(scope, dev);
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}
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aml_append(ssdt, scope);
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aml_append(dsdt, scope);
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/* create S3_ / S4_ / S5_ packages if necessary */
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scope = aml_scope("\\");
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@ -2097,7 +2186,7 @@ build_ssdt(GArray *table_data, GArray *linker,
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aml_append(pkg, aml_int(0)); /* reserved */
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aml_append(pkg, aml_int(0)); /* reserved */
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aml_append(scope, aml_name_decl("_S5", pkg));
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aml_append(ssdt, scope);
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aml_append(dsdt, scope);
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if (misc->applesmc_io_base) {
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scope = aml_scope("\\_SB.PCI0.ISA");
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@ -2116,7 +2205,7 @@ build_ssdt(GArray *table_data, GArray *linker,
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aml_append(dev, aml_name_decl("_CRS", crs));
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aml_append(scope, dev);
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aml_append(ssdt, scope);
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aml_append(dsdt, scope);
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}
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if (misc->pvpanic_port) {
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@ -2150,7 +2239,7 @@ build_ssdt(GArray *table_data, GArray *linker,
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aml_append(dev, method);
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aml_append(scope, dev);
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aml_append(ssdt, scope);
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aml_append(dsdt, scope);
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}
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sb_scope = aml_scope("\\_SB");
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@ -2189,14 +2278,14 @@ build_ssdt(GArray *table_data, GArray *linker,
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aml_append(sb_scope, scope);
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}
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}
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aml_append(ssdt, sb_scope);
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aml_append(dsdt, sb_scope);
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}
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/* copy AML table into ACPI tables blob and patch header there */
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g_array_append_vals(table_data, ssdt->buf->data, ssdt->buf->len);
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g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len);
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build_header(linker, table_data,
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(void *)(table_data->data + table_data->len - ssdt->buf->len),
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"SSDT", ssdt->buf->len, 1, NULL);
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(void *)(table_data->data + table_data->len - dsdt->buf->len),
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"DSDT", dsdt->buf->len, 1, NULL);
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free_aml_allocator();
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}
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@ -2422,116 +2511,6 @@ build_dmar_q35(GArray *table_data, GArray *linker)
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"DMAR", table_data->len - dmar_start, 1, NULL);
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}
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static void
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build_dsdt(GArray *table_data, GArray *linker,
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AcpiPmInfo *pm, AcpiMiscInfo *misc)
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{
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Aml *dsdt, *sb_scope, *scope, *dev, *method, *field;
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MachineState *machine = MACHINE(qdev_get_machine());
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uint32_t nr_mem = machine->ram_slots;
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dsdt = init_aml_allocator();
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/* Reserve space for header */
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acpi_data_push(dsdt->buf, sizeof(AcpiTableHeader));
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build_dbg_aml(dsdt);
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if (misc->is_piix4) {
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sb_scope = aml_scope("_SB");
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dev = aml_device("PCI0");
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aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A03")));
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aml_append(dev, aml_name_decl("_ADR", aml_int(0)));
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aml_append(dev, aml_name_decl("_UID", aml_int(1)));
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aml_append(sb_scope, dev);
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aml_append(dsdt, sb_scope);
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build_hpet_aml(dsdt);
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build_piix4_pm(dsdt);
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build_piix4_isa_bridge(dsdt);
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build_isa_devices_aml(dsdt);
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build_piix4_pci_hotplug(dsdt);
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build_piix4_pci0_int(dsdt);
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} else {
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sb_scope = aml_scope("_SB");
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aml_append(sb_scope,
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aml_operation_region("PCST", AML_SYSTEM_IO, 0xae00, 0x0c));
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aml_append(sb_scope,
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aml_operation_region("PCSB", AML_SYSTEM_IO, 0xae0c, 0x01));
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field = aml_field("PCSB", AML_ANY_ACC, AML_NOLOCK, AML_WRITE_AS_ZEROS);
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aml_append(field, aml_named_field("PCIB", 8));
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aml_append(sb_scope, field);
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aml_append(dsdt, sb_scope);
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sb_scope = aml_scope("_SB");
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dev = aml_device("PCI0");
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aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A08")));
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aml_append(dev, aml_name_decl("_CID", aml_eisaid("PNP0A03")));
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aml_append(dev, aml_name_decl("_ADR", aml_int(0)));
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aml_append(dev, aml_name_decl("_UID", aml_int(1)));
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aml_append(dev, aml_name_decl("SUPP", aml_int(0)));
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aml_append(dev, aml_name_decl("CTRL", aml_int(0)));
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aml_append(dev, build_q35_osc_method());
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aml_append(sb_scope, dev);
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aml_append(dsdt, sb_scope);
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build_hpet_aml(dsdt);
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build_q35_isa_bridge(dsdt);
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build_isa_devices_aml(dsdt);
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build_q35_pci0_int(dsdt);
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}
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build_cpu_hotplug_aml(dsdt);
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build_memory_hotplug_aml(dsdt, nr_mem, pm->mem_hp_io_base,
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pm->mem_hp_io_len);
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scope = aml_scope("_GPE");
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{
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aml_append(scope, aml_name_decl("_HID", aml_string("ACPI0006")));
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aml_append(scope, aml_method("_L00", 0, AML_NOTSERIALIZED));
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if (misc->is_piix4) {
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method = aml_method("_E01", 0, AML_NOTSERIALIZED);
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aml_append(method,
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aml_acquire(aml_name("\\_SB.PCI0.BLCK"), 0xFFFF));
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aml_append(method, aml_call0("\\_SB.PCI0.PCNT"));
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aml_append(method, aml_release(aml_name("\\_SB.PCI0.BLCK")));
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aml_append(scope, method);
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} else {
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aml_append(scope, aml_method("_L01", 0, AML_NOTSERIALIZED));
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}
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method = aml_method("_E02", 0, AML_NOTSERIALIZED);
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aml_append(method, aml_call0("\\_SB." CPU_SCAN_METHOD));
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aml_append(scope, method);
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method = aml_method("_E03", 0, AML_NOTSERIALIZED);
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aml_append(method, aml_call0(MEMORY_HOTPLUG_HANDLER_PATH));
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aml_append(scope, method);
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aml_append(scope, aml_method("_L04", 0, AML_NOTSERIALIZED));
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aml_append(scope, aml_method("_L05", 0, AML_NOTSERIALIZED));
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aml_append(scope, aml_method("_L06", 0, AML_NOTSERIALIZED));
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aml_append(scope, aml_method("_L07", 0, AML_NOTSERIALIZED));
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aml_append(scope, aml_method("_L08", 0, AML_NOTSERIALIZED));
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aml_append(scope, aml_method("_L09", 0, AML_NOTSERIALIZED));
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aml_append(scope, aml_method("_L0A", 0, AML_NOTSERIALIZED));
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aml_append(scope, aml_method("_L0B", 0, AML_NOTSERIALIZED));
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aml_append(scope, aml_method("_L0C", 0, AML_NOTSERIALIZED));
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aml_append(scope, aml_method("_L0D", 0, AML_NOTSERIALIZED));
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aml_append(scope, aml_method("_L0E", 0, AML_NOTSERIALIZED));
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aml_append(scope, aml_method("_L0F", 0, AML_NOTSERIALIZED));
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}
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aml_append(dsdt, scope);
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/* copy AML table into ACPI tables blob and patch header there */
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g_array_append_vals(table_data, dsdt->buf->data, dsdt->buf->len);
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build_header(linker, table_data,
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(void *)(table_data->data + table_data->len - dsdt->buf->len),
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"DSDT", dsdt->buf->len, 1, NULL);
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free_aml_allocator();
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}
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static GArray *
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build_rsdp(GArray *rsdp_table, GArray *linker, unsigned rsdt)
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{
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@ -2611,7 +2590,7 @@ static
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void acpi_build(PcGuestInfo *guest_info, AcpiBuildTables *tables)
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{
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GArray *table_offsets;
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unsigned facs, ssdt, dsdt, rsdt;
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unsigned facs, dsdt, rsdt, fadt;
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AcpiCpuInfo cpu;
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AcpiPmInfo pm;
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AcpiMiscInfo misc;
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@ -2644,7 +2623,8 @@ void acpi_build(PcGuestInfo *guest_info, AcpiBuildTables *tables)
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/* DSDT is pointed to by FADT */
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dsdt = tables_blob->len;
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build_dsdt(tables_blob, tables->linker, &pm, &misc);
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build_dsdt(tables_blob, tables->linker, &cpu, &pm, &misc, &pci,
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guest_info);
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/* Count the size of the DSDT and SSDT, we will need it for legacy
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* sizing of ACPI tables.
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@ -2652,14 +2632,10 @@ void acpi_build(PcGuestInfo *guest_info, AcpiBuildTables *tables)
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aml_len += tables_blob->len - dsdt;
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/* ACPI tables pointed to by RSDT */
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fadt = tables_blob->len;
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acpi_add_table(table_offsets, tables_blob);
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build_fadt(tables_blob, tables->linker, &pm, facs, dsdt);
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ssdt = tables_blob->len;
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acpi_add_table(table_offsets, tables_blob);
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build_ssdt(tables_blob, tables->linker, &cpu, &pm, &misc, &pci,
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guest_info);
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aml_len += tables_blob->len - ssdt;
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aml_len += tables_blob->len - fadt;
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acpi_add_table(table_offsets, tables_blob);
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build_madt(tables_blob, tables->linker, &cpu, guest_info);
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