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hw/arm/omap1: Use qemu_log_mask(GUEST_ERROR) instead of fprintf

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TCMI_VERBOSE is no more used, drop the OMAP_8/16/32B_REG macros.

Suggested-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-id: 20180624040609.17572-9-f4bug@amsat.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Philippe Mathieu-Daudé 2018-06-26 17:50:40 +01:00 committed by Peter Maydell
parent 8d2774f0ff
commit 415202d4c9
2 changed files with 12 additions and 24 deletions
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18
hw/arm/omap1.c
View File

@ -34,12 +34,18 @@
#include "qemu/cutils.h" #include "qemu/cutils.h"
#include "qemu/bcd.h" #include "qemu/bcd.h"
static inline void omap_log_badwidth(const char *funcname, hwaddr addr, int sz)
{
qemu_log_mask(LOG_GUEST_ERROR, "%s: %d-bit register %#08" HWADDR_PRIx "\n",
funcname, 8 * sz, addr);
}
/* Should signal the TCMI/GPMC */ /* Should signal the TCMI/GPMC */
uint32_t omap_badwidth_read8(void *opaque, hwaddr addr) uint32_t omap_badwidth_read8(void *opaque, hwaddr addr)
{ {
uint8_t ret; uint8_t ret;
OMAP_8B_REG(addr); omap_log_badwidth(__func__, addr, 1);
cpu_physical_memory_read(addr, &ret, 1); cpu_physical_memory_read(addr, &ret, 1);
return ret; return ret;
} }
@ -49,7 +55,7 @@ void omap_badwidth_write8(void *opaque, hwaddr addr,
{ {
uint8_t val8 = value; uint8_t val8 = value;
OMAP_8B_REG(addr); omap_log_badwidth(__func__, addr, 1);
cpu_physical_memory_write(addr, &val8, 1); cpu_physical_memory_write(addr, &val8, 1);
} }
@ -57,7 +63,7 @@ uint32_t omap_badwidth_read16(void *opaque, hwaddr addr)
{ {
uint16_t ret; uint16_t ret;
OMAP_16B_REG(addr); omap_log_badwidth(__func__, addr, 2);
cpu_physical_memory_read(addr, &ret, 2); cpu_physical_memory_read(addr, &ret, 2);
return ret; return ret;
} }
@ -67,7 +73,7 @@ void omap_badwidth_write16(void *opaque, hwaddr addr,
{ {
uint16_t val16 = value; uint16_t val16 = value;
OMAP_16B_REG(addr); omap_log_badwidth(__func__, addr, 2);
cpu_physical_memory_write(addr, &val16, 2); cpu_physical_memory_write(addr, &val16, 2);
} }
@ -75,7 +81,7 @@ uint32_t omap_badwidth_read32(void *opaque, hwaddr addr)
{ {
uint32_t ret; uint32_t ret;
OMAP_32B_REG(addr); omap_log_badwidth(__func__, addr, 4);
cpu_physical_memory_read(addr, &ret, 4); cpu_physical_memory_read(addr, &ret, 4);
return ret; return ret;
} }
@ -83,7 +89,7 @@ uint32_t omap_badwidth_read32(void *opaque, hwaddr addr)
void omap_badwidth_write32(void *opaque, hwaddr addr, void omap_badwidth_write32(void *opaque, hwaddr addr,
uint32_t value) uint32_t value)
{ {
OMAP_32B_REG(addr); omap_log_badwidth(__func__, addr, 4);
cpu_physical_memory_write(addr, &value, 4); cpu_physical_memory_write(addr, &value, 4);
} }

18
include/hw/arm/omap.h
View File

@ -993,24 +993,6 @@ enum {
#define OMAP_GPIOSW_INVERTED 0x0001 #define OMAP_GPIOSW_INVERTED 0x0001
#define OMAP_GPIOSW_OUTPUT 0x0002 #define OMAP_GPIOSW_OUTPUT 0x0002
# define TCMI_VERBOSE 1
# ifdef TCMI_VERBOSE
# define OMAP_8B_REG(paddr) \
fprintf(stderr, "%s: 8-bit register " OMAP_FMT_plx "\n", \
__func__, paddr)
# define OMAP_16B_REG(paddr) \
fprintf(stderr, "%s: 16-bit register " OMAP_FMT_plx "\n", \
__func__, paddr)
# define OMAP_32B_REG(paddr) \
fprintf(stderr, "%s: 32-bit register " OMAP_FMT_plx "\n", \
__func__, paddr)
# else
# define OMAP_8B_REG(paddr)
# define OMAP_16B_REG(paddr)
# define OMAP_32B_REG(paddr)
# endif
# define OMAP_MPUI_REG_MASK 0x000007ff # define OMAP_MPUI_REG_MASK 0x000007ff
#endif /* hw_omap_h */ #endif /* hw_omap_h */