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hw/intc/arm_gicv3: Move irq lines into GICv3CPUState structure
Move the GICv3 parent_irq and parent_fiq pointers into the GICv3CPUState structure rather than giving them their own array. This will make it easy to assert the IRQ and FIQ lines for a particular CPU interface without having to know or calculate the CPU index for the GICv3CPUState we are working on. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Shannon Zhao <shannon.zhao@linaro.org> Tested-by: Shannon Zhao <shannon.zhao@linaro.org> Message-id: 1465915112-29272-8-git-send-email-peter.maydell@linaro.org
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@ -72,14 +72,11 @@ void gicv3_init_irqs_and_mmio(GICv3State *s, qemu_irq_handler handler,
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i = s->num_irq - GIC_INTERNAL + GIC_INTERNAL * s->num_cpu;
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qdev_init_gpio_in(DEVICE(s), handler, i);
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s->parent_irq = g_malloc(s->num_cpu * sizeof(qemu_irq));
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s->parent_fiq = g_malloc(s->num_cpu * sizeof(qemu_irq));
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for (i = 0; i < s->num_cpu; i++) {
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sysbus_init_irq(sbd, &s->parent_irq[i]);
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sysbus_init_irq(sbd, &s->cpu[i].parent_irq);
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}
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for (i = 0; i < s->num_cpu; i++) {
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sysbus_init_irq(sbd, &s->parent_fiq[i]);
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sysbus_init_irq(sbd, &s->cpu[i].parent_fiq);
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}
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memory_region_init_io(&s->iomem_dist, OBJECT(s), ops, s,
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@ -134,6 +134,8 @@ typedef struct GICv3CPUState GICv3CPUState;
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struct GICv3CPUState {
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GICv3State *gic;
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CPUState *cpu;
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qemu_irq parent_irq;
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qemu_irq parent_fiq;
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/* Redistributor */
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uint32_t level; /* Current IRQ level */
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@ -168,9 +170,6 @@ struct GICv3State {
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SysBusDevice parent_obj;
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/*< public >*/
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qemu_irq *parent_irq;
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qemu_irq *parent_fiq;
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MemoryRegion iomem_dist; /* Distributor */
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MemoryRegion iomem_redist; /* Redistributors */
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