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hw/arm/aspeed: Dynamically allocate AspeedMachineState::soc field
We want to derivate the big AspeedSoCState object in some more SoC-specific ones. Since the object size will vary, allocate it dynamically. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
This commit is contained in:
Philippe Mathieu-Daudé
Cédric Le Goater
parent
aa6c6697bb
commit
3c392e87df
101
hw/arm/aspeed.c
101
hw/arm/aspeed.c
@ -40,7 +40,7 @@ struct AspeedMachineState {
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MachineState parent_obj;
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/* Public */
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AspeedSoCState soc;
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AspeedSoCState *soc;
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MemoryRegion boot_rom;
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bool mmio_exec;
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uint32_t uart_chosen;
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@ -288,7 +288,7 @@ static void write_boot_rom(BlockBackend *blk, hwaddr addr, size_t rom_size,
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static void aspeed_install_boot_rom(AspeedMachineState *bmc, BlockBackend *blk,
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uint64_t rom_size)
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{
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AspeedSoCState *soc = &bmc->soc;
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AspeedSoCState *soc = bmc->soc;
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memory_region_init_rom(&bmc->boot_rom, NULL, "aspeed.boot_rom", rom_size,
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&error_abort);
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@ -337,7 +337,7 @@ static void sdhci_attach_drive(SDHCIState *sdhci, DriveInfo *dinfo)
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static void connect_serial_hds_to_uarts(AspeedMachineState *bmc)
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{
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AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(bmc);
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AspeedSoCState *s = &bmc->soc;
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AspeedSoCState *s = bmc->soc;
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AspeedSoCClass *sc = ASPEED_SOC_GET_CLASS(s);
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int uart_chosen = bmc->uart_chosen ? bmc->uart_chosen : amc->uart_default;
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@ -358,32 +358,33 @@ static void aspeed_machine_init(MachineState *machine)
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int i;
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NICInfo *nd = &nd_table[0];
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object_initialize_child(OBJECT(machine), "soc", &bmc->soc, amc->soc_name);
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sc = ASPEED_SOC_GET_CLASS(&bmc->soc);
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bmc->soc = ASPEED_SOC(object_new(amc->soc_name));
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object_property_add_child(OBJECT(machine), "soc", OBJECT(bmc->soc));
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object_unref(OBJECT(bmc->soc));
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sc = ASPEED_SOC_GET_CLASS(bmc->soc);
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/*
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* This will error out if the RAM size is not supported by the
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* memory controller of the SoC.
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*/
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object_property_set_uint(OBJECT(&bmc->soc), "ram-size", machine->ram_size,
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object_property_set_uint(OBJECT(bmc->soc), "ram-size", machine->ram_size,
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&error_fatal);
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for (i = 0; i < sc->macs_num; i++) {
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if ((amc->macs_mask & (1 << i)) && nd->used) {
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qemu_check_nic_model(nd, TYPE_FTGMAC100);
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qdev_set_nic_properties(DEVICE(&bmc->soc.ftgmac100[i]), nd);
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qdev_set_nic_properties(DEVICE(&bmc->soc->ftgmac100[i]), nd);
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nd++;
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}
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}
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object_property_set_int(OBJECT(&bmc->soc), "hw-strap1", amc->hw_strap1,
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object_property_set_int(OBJECT(bmc->soc), "hw-strap1", amc->hw_strap1,
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&error_abort);
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object_property_set_int(OBJECT(&bmc->soc), "hw-strap2", amc->hw_strap2,
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object_property_set_int(OBJECT(bmc->soc), "hw-strap2", amc->hw_strap2,
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&error_abort);
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object_property_set_link(OBJECT(&bmc->soc), "memory",
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object_property_set_link(OBJECT(bmc->soc), "memory",
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OBJECT(get_system_memory()), &error_abort);
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object_property_set_link(OBJECT(&bmc->soc), "dram",
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object_property_set_link(OBJECT(bmc->soc), "dram",
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OBJECT(machine->ram), &error_abort);
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if (machine->kernel_filename) {
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/*
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@ -391,17 +392,17 @@ static void aspeed_machine_init(MachineState *machine)
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* that runs to unlock the SCU. In this case set the default to
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* be unlocked as the kernel expects
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*/
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object_property_set_int(OBJECT(&bmc->soc), "hw-prot-key",
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object_property_set_int(OBJECT(bmc->soc), "hw-prot-key",
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ASPEED_SCU_PROT_KEY, &error_abort);
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}
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connect_serial_hds_to_uarts(bmc);
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qdev_realize(DEVICE(&bmc->soc), NULL, &error_abort);
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qdev_realize(DEVICE(bmc->soc), NULL, &error_abort);
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if (defaults_enabled()) {
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aspeed_board_init_flashes(&bmc->soc.fmc,
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aspeed_board_init_flashes(&bmc->soc->fmc,
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bmc->fmc_model ? bmc->fmc_model : amc->fmc_model,
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amc->num_cs, 0);
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aspeed_board_init_flashes(&bmc->soc.spi[0],
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aspeed_board_init_flashes(&bmc->soc->spi[0],
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bmc->spi_model ? bmc->spi_model : amc->spi_model,
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1, amc->num_cs);
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}
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@ -426,22 +427,22 @@ static void aspeed_machine_init(MachineState *machine)
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amc->i2c_init(bmc);
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}
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for (i = 0; i < bmc->soc.sdhci.num_slots; i++) {
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sdhci_attach_drive(&bmc->soc.sdhci.slots[i],
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for (i = 0; i < bmc->soc->sdhci.num_slots; i++) {
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sdhci_attach_drive(&bmc->soc->sdhci.slots[i],
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drive_get(IF_SD, 0, i));
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}
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if (bmc->soc.emmc.num_slots) {
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sdhci_attach_drive(&bmc->soc.emmc.slots[0],
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drive_get(IF_SD, 0, bmc->soc.sdhci.num_slots));
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if (bmc->soc->emmc.num_slots) {
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sdhci_attach_drive(&bmc->soc->emmc.slots[0],
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drive_get(IF_SD, 0, bmc->soc->sdhci.num_slots));
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}
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if (!bmc->mmio_exec) {
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DeviceState *dev = ssi_get_cs(bmc->soc.fmc.spi, 0);
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DeviceState *dev = ssi_get_cs(bmc->soc->fmc.spi, 0);
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BlockBackend *fmc0 = dev ? m25p80_get_blk(dev) : NULL;
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if (fmc0) {
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uint64_t rom_size = memory_region_size(&bmc->soc.spi_boot);
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uint64_t rom_size = memory_region_size(&bmc->soc->spi_boot);
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aspeed_install_boot_rom(bmc, fmc0, rom_size);
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}
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}
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@ -451,7 +452,7 @@ static void aspeed_machine_init(MachineState *machine)
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static void palmetto_bmc_i2c_init(AspeedMachineState *bmc)
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{
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AspeedSoCState *soc = &bmc->soc;
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AspeedSoCState *soc = bmc->soc;
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DeviceState *dev;
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uint8_t *eeprom_buf = g_malloc0(32 * 1024);
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@ -473,7 +474,7 @@ static void palmetto_bmc_i2c_init(AspeedMachineState *bmc)
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static void quanta_q71l_bmc_i2c_init(AspeedMachineState *bmc)
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{
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AspeedSoCState *soc = &bmc->soc;
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AspeedSoCState *soc = bmc->soc;
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/*
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* The quanta-q71l platform expects tmp75s which are compatible with
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@ -505,7 +506,7 @@ static void quanta_q71l_bmc_i2c_init(AspeedMachineState *bmc)
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static void ast2500_evb_i2c_init(AspeedMachineState *bmc)
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{
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AspeedSoCState *soc = &bmc->soc;
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AspeedSoCState *soc = bmc->soc;
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uint8_t *eeprom_buf = g_malloc0(8 * 1024);
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smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 3), 0x50,
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@ -518,7 +519,7 @@ static void ast2500_evb_i2c_init(AspeedMachineState *bmc)
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static void ast2600_evb_i2c_init(AspeedMachineState *bmc)
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{
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AspeedSoCState *soc = &bmc->soc;
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AspeedSoCState *soc = bmc->soc;
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uint8_t *eeprom_buf = g_malloc0(8 * 1024);
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smbus_eeprom_init_one(aspeed_i2c_get_bus(&soc->i2c, 7), 0x50,
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@ -531,7 +532,7 @@ static void ast2600_evb_i2c_init(AspeedMachineState *bmc)
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static void yosemitev2_bmc_i2c_init(AspeedMachineState *bmc)
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{
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AspeedSoCState *soc = &bmc->soc;
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AspeedSoCState *soc = bmc->soc;
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at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 4), 0x51, 128 * KiB);
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at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 8), 0x51, 128 * KiB,
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@ -545,7 +546,7 @@ static void yosemitev2_bmc_i2c_init(AspeedMachineState *bmc)
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static void romulus_bmc_i2c_init(AspeedMachineState *bmc)
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{
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AspeedSoCState *soc = &bmc->soc;
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AspeedSoCState *soc = bmc->soc;
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/* The romulus board expects Epson RX8900 I2C RTC but a ds1338 is
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* good enough */
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@ -554,7 +555,7 @@ static void romulus_bmc_i2c_init(AspeedMachineState *bmc)
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static void tiogapass_bmc_i2c_init(AspeedMachineState *bmc)
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{
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AspeedSoCState *soc = &bmc->soc;
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AspeedSoCState *soc = bmc->soc;
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at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 4), 0x54, 128 * KiB);
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at24c_eeprom_init_rom(aspeed_i2c_get_bus(&soc->i2c, 6), 0x54, 128 * KiB,
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@ -573,7 +574,7 @@ static void create_pca9552(AspeedSoCState *soc, int bus_id, int addr)
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static void sonorapass_bmc_i2c_init(AspeedMachineState *bmc)
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{
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AspeedSoCState *soc = &bmc->soc;
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AspeedSoCState *soc = bmc->soc;
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/* bus 2 : */
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i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 2), "tmp105", 0x48);
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@ -627,7 +628,7 @@ static void witherspoon_bmc_i2c_init(AspeedMachineState *bmc)
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{14, LED_COLOR_GREEN, "front-power-3", GPIO_POLARITY_ACTIVE_LOW},
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{15, LED_COLOR_GREEN, "front-id-5", GPIO_POLARITY_ACTIVE_LOW},
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};
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AspeedSoCState *soc = &bmc->soc;
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AspeedSoCState *soc = bmc->soc;
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uint8_t *eeprom_buf = g_malloc0(8 * 1024);
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DeviceState *dev;
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LEDState *led;
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@ -672,7 +673,7 @@ static void witherspoon_bmc_i2c_init(AspeedMachineState *bmc)
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static void g220a_bmc_i2c_init(AspeedMachineState *bmc)
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{
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AspeedSoCState *soc = &bmc->soc;
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AspeedSoCState *soc = bmc->soc;
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DeviceState *dev;
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dev = DEVICE(i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 3),
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@ -708,7 +709,7 @@ static void g220a_bmc_i2c_init(AspeedMachineState *bmc)
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static void fp5280g2_bmc_i2c_init(AspeedMachineState *bmc)
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{
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AspeedSoCState *soc = &bmc->soc;
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AspeedSoCState *soc = bmc->soc;
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I2CSlave *i2c_mux;
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/* The at24c256 */
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@ -735,7 +736,7 @@ static void fp5280g2_bmc_i2c_init(AspeedMachineState *bmc)
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static void rainier_bmc_i2c_init(AspeedMachineState *bmc)
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{
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AspeedSoCState *soc = &bmc->soc;
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AspeedSoCState *soc = bmc->soc;
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I2CSlave *i2c_mux;
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at24c_eeprom_init(aspeed_i2c_get_bus(&soc->i2c, 0), 0x51, 32 * KiB);
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@ -852,7 +853,7 @@ static void get_pca9548_channels(I2CBus *bus, uint8_t mux_addr,
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static void fuji_bmc_i2c_init(AspeedMachineState *bmc)
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{
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AspeedSoCState *soc = &bmc->soc;
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AspeedSoCState *soc = bmc->soc;
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I2CBus *i2c[144] = {};
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for (int i = 0; i < 16; i++) {
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@ -930,7 +931,7 @@ static void fuji_bmc_i2c_init(AspeedMachineState *bmc)
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static void bletchley_bmc_i2c_init(AspeedMachineState *bmc)
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{
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AspeedSoCState *soc = &bmc->soc;
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AspeedSoCState *soc = bmc->soc;
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I2CBus *i2c[13] = {};
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for (int i = 0; i < 13; i++) {
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if ((i == 8) || (i == 11)) {
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@ -976,7 +977,7 @@ static void bletchley_bmc_i2c_init(AspeedMachineState *bmc)
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static void fby35_i2c_init(AspeedMachineState *bmc)
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{
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AspeedSoCState *soc = &bmc->soc;
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AspeedSoCState *soc = bmc->soc;
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I2CBus *i2c[16];
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for (int i = 0; i < 16; i++) {
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@ -1008,14 +1009,14 @@ static void fby35_i2c_init(AspeedMachineState *bmc)
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static void qcom_dc_scm_bmc_i2c_init(AspeedMachineState *bmc)
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{
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AspeedSoCState *soc = &bmc->soc;
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AspeedSoCState *soc = bmc->soc;
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i2c_slave_create_simple(aspeed_i2c_get_bus(&soc->i2c, 15), "tmp105", 0x4d);
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}
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static void qcom_dc_scm_firework_i2c_init(AspeedMachineState *bmc)
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{
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AspeedSoCState *soc = &bmc->soc;
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AspeedSoCState *soc = bmc->soc;
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I2CSlave *therm_mux, *cpuvr_mux;
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/* Create the generic DC-SCM hardware */
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@ -1477,7 +1478,7 @@ static void aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data)
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static void fby35_reset(MachineState *state, ShutdownCause reason)
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{
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AspeedMachineState *bmc = ASPEED_MACHINE(state);
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AspeedGPIOState *gpio = &bmc->soc.gpio;
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AspeedGPIOState *gpio = &bmc->soc->gpio;
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qemu_devices_reset(reason);
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@ -1528,24 +1529,26 @@ static void aspeed_minibmc_machine_init(MachineState *machine)
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sysclk = clock_new(OBJECT(machine), "SYSCLK");
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clock_set_hz(sysclk, SYSCLK_FRQ);
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object_initialize_child(OBJECT(machine), "soc", &bmc->soc, amc->soc_name);
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qdev_connect_clock_in(DEVICE(&bmc->soc), "sysclk", sysclk);
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bmc->soc = ASPEED_SOC(object_new(amc->soc_name));
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object_property_add_child(OBJECT(machine), "soc", OBJECT(bmc->soc));
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object_unref(OBJECT(bmc->soc));
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qdev_connect_clock_in(DEVICE(bmc->soc), "sysclk", sysclk);
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object_property_set_link(OBJECT(&bmc->soc), "memory",
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object_property_set_link(OBJECT(bmc->soc), "memory",
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OBJECT(get_system_memory()), &error_abort);
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connect_serial_hds_to_uarts(bmc);
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qdev_realize(DEVICE(&bmc->soc), NULL, &error_abort);
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qdev_realize(DEVICE(bmc->soc), NULL, &error_abort);
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aspeed_board_init_flashes(&bmc->soc.fmc,
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aspeed_board_init_flashes(&bmc->soc->fmc,
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bmc->fmc_model ? bmc->fmc_model : amc->fmc_model,
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amc->num_cs,
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0);
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aspeed_board_init_flashes(&bmc->soc.spi[0],
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aspeed_board_init_flashes(&bmc->soc->spi[0],
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bmc->spi_model ? bmc->spi_model : amc->spi_model,
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amc->num_cs, amc->num_cs);
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aspeed_board_init_flashes(&bmc->soc.spi[1],
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aspeed_board_init_flashes(&bmc->soc->spi[1],
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bmc->spi_model ? bmc->spi_model : amc->spi_model,
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amc->num_cs, (amc->num_cs * 2));
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@ -1561,7 +1564,7 @@ static void aspeed_minibmc_machine_init(MachineState *machine)
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static void ast1030_evb_i2c_init(AspeedMachineState *bmc)
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{
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AspeedSoCState *soc = &bmc->soc;
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AspeedSoCState *soc = bmc->soc;
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/* U10 24C08 connects to SDA/SCL Group 1 by default */
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uint8_t *eeprom_buf = g_malloc0(32 * 1024);
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