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target/s390x: Handle STGRL to non-aligned addresses

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Use MO_ALIGN and let do_unaligned_access() generate a specification
exception.

Reported-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Suggested-by: Nina Schoetterl-Glausch <nsg@linux.ibm.com>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230316164428.275147-11-iii@linux.ibm.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
This commit is contained in:
Ilya Leoshkevich 2023-03-16 17:44:26 +01:00 committed by Thomas Huth
parent 2bc66225d8
commit 39ad734445
2 changed files with 6 additions and 5 deletions
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8
target/s390x/tcg/insn-data.h.inc
View File

@ -842,14 +842,14 @@
/* STORE */
D(0x5000, ST, RX_a, Z, r1_o, a2, 0, 0, st32, 0, 0)
D(0xe350, STY, RXY_a, LD, r1_o, a2, 0, 0, st32, 0, 0)
C(0xe324, STG, RXY_a, Z, r1_o, a2, 0, 0, st64, 0)
F(0x6000, STD, RX_a, Z, f1, a2, 0, 0, st64, 0, IF_AFP1)
F(0xed67, STDY, RXY_a, LD, f1, a2, 0, 0, st64, 0, IF_AFP1)
D(0xe324, STG, RXY_a, Z, r1_o, a2, 0, 0, st64, 0, 0)
E(0x6000, STD, RX_a, Z, f1, a2, 0, 0, st64, 0, 0, IF_AFP1)
E(0xed67, STDY, RXY_a, LD, f1, a2, 0, 0, st64, 0, 0, IF_AFP1)
E(0x7000, STE, RX_a, Z, e1, a2, 0, 0, st32, 0, 0, IF_AFP1)
E(0xed66, STEY, RXY_a, LD, e1, a2, 0, 0, st32, 0, 0, IF_AFP1)
/* STORE RELATIVE LONG */
D(0xc40f, STRL, RIL_b, GIE, r1_o, ri2, 0, 0, st32, 0, MO_ALIGN)
C(0xc40b, STGRL, RIL_b, GIE, r1_o, ri2, 0, 0, st64, 0)
D(0xc40b, STGRL, RIL_b, GIE, r1_o, ri2, 0, 0, st64, 0, MO_ALIGN)
/* STORE CHARACTER */
C(0x4200, STC, RX_a, Z, r1_o, a2, 0, 0, st8, 0)
C(0xe372, STCY, RXY_a, LD, r1_o, a2, 0, 0, st8, 0)

3
target/s390x/tcg/translate.c
View File

@ -4399,7 +4399,8 @@ static DisasJumpType op_st32(DisasContext *s, DisasOps *o)
static DisasJumpType op_st64(DisasContext *s, DisasOps *o)
{
tcg_gen_qemu_st64(o->in1, o->in2, get_mem_index(s));
tcg_gen_qemu_st_i64(o->in1, o->in2, get_mem_index(s),
MO_TEUQ | s->insn->data);
return DISAS_NEXT;
}