mirror of
https://github.com/qemu/qemu.git
synced 2024-11-23 19:03:38 +08:00
m68k host port (Richard Zidlicky)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@357 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard
parent
313aa56710
commit
38e584a072
@ -79,6 +79,11 @@ OP_CFLAGS=$(CFLAGS) -mno-sched-prolog
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LDFLAGS+=-Wl,-T,$(SRC_PATH)/arm.ld
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endif
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ifeq ($(ARCH),m68k)
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OP_CFLAGS=$(CFLAGS) -fomit-frame-pointer
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LDFLAGS+=-Wl,-T,m68k.ld
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endif
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ifeq ($(HAVE_GCC3_OPTIONS),yes)
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# very important to generate a return at the end of every operation
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OP_CFLAGS+=-fno-reorder-blocks -fno-optimize-sibling-calls
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8
configure
vendored
8
configure
vendored
@ -56,6 +56,9 @@ case "$cpu" in
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ia64)
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cpu="ia64"
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;;
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m68k)
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cpu="m68k"
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;;
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*)
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cpu="unknown"
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;;
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@ -163,7 +166,7 @@ fi
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else
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# if cross compiling, cannot launch a program, so make a static guess
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if test "$cpu" = "powerpc" -o "$cpu" = "mips" -o "$cpu" = "s390" -o "$cpu" = "sparc" -o "$cpu" = "sparc64"; then
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if test "$cpu" = "powerpc" -o "$cpu" = "mips" -o "$cpu" = "s390" -o "$cpu" = "sparc" -o "$cpu" = "sparc64" -o "$cpu" = "m68k"; then
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bigendian="yes"
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fi
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@ -265,6 +268,9 @@ elif test "$cpu" = "sparc64" ; then
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elif test "$cpu" = "ia64" ; then
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echo "ARCH=ia64" >> $config_mak
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echo "#define HOST_IA64 1" >> $config_h
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elif test "$cpu" = "m68k" ; then
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echo "ARCH=m68k" >> config.mak
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echo "#define HOST_M68K 1" >> $TMPH
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else
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echo "Unsupported CPU"
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exit 1
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17
cpu-exec.c
17
cpu-exec.c
@ -642,6 +642,23 @@ int cpu_signal_handler(int host_signum, struct siginfo *info,
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&uc->uc_sigmask);
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}
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#elif defined(__mc68000)
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int cpu_signal_handler(int host_signum, struct siginfo *info,
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void *puc)
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{
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struct ucontext *uc = puc;
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unsigned long pc;
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int is_write;
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pc = uc->uc_mcontext.gregs[16];
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/* XXX: compute is_write */
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is_write = 0;
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return handle_cpu_signal(pc, (unsigned long)info->si_addr,
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is_write,
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&uc->uc_sigmask);
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}
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#else
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#error host CPU specific signal handler needed
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@ -109,6 +109,13 @@ extern int printf(const char *, ...);
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#define AREG5 "$13"
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#define AREG6 "$14"
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#endif
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#ifdef __mc68000
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#define AREG0 "%a5"
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#define AREG1 "%a4"
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#define AREG2 "%d7"
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#define AREG3 "%d6"
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#define AREG4 "%d5"
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#endif
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#ifdef __ia64__
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#define AREG0 "r27"
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#define AREG1 "r24"
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@ -178,4 +185,6 @@ extern int __op_jmp0, __op_jmp1;
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#ifdef __arm__
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#define EXIT_TB() asm volatile ("b exec_loop")
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#endif
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#ifdef __mc68000
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#define EXIT_TB() asm volatile ("rts")
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#endif
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57
dyngen.c
57
dyngen.c
@ -86,6 +86,13 @@
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#define elf_check_arch(x) ((x) == EM_ARM)
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#define ELF_USES_RELOC
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#elif defined(HOST_M68K)
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#define ELF_CLASS ELFCLASS32
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#define ELF_ARCH EM_68K
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#define elf_check_arch(x) ((x) == EM_68K)
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#define ELF_USES_RELOCA
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#else
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#error unsupported CPU - please update the code
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#endif
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@ -575,6 +582,21 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
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relocs, nb_relocs);
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break;
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#endif
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case EM_68K:
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{
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uint8_t *p;
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p = (void *)(p_end - 2);
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if (p == p_start)
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error("empty code for %s", name);
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// remove NOP's, probably added for alignment
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while ((get16((uint16_t *)p) == 0x4e71) &&
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(p>p_start))
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p -= 2;
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if (get16((uint16_t *)p) != 0x4e75)
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error("rts expected at the end of %s", name);
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copy_size = p - p_start;
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}
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break;
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default:
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error("unknown ELF architecture");
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}
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@ -1062,6 +1084,41 @@ void gen_code(const char *name, host_ulong offset, host_ulong size,
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}
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}
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}
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#elif defined(HOST_M68K)
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{
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char name[256];
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int type;
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int addend;
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Elf32_Sym *sym;
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for(i = 0, rel = relocs;i < nb_relocs; i++, rel++) {
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if (rel->r_offset >= start_offset &&
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rel->r_offset < start_offset + copy_size) {
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sym = &(symtab[ELFW(R_SYM)(rel->r_info)]);
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sym_name = strtab + symtab[ELFW(R_SYM)(rel->r_info)].st_name;
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if (strstart(sym_name, "__op_param", &p)) {
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snprintf(name, sizeof(name), "param%s", p);
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} else {
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snprintf(name, sizeof(name), "(long)(&%s)", sym_name);
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}
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type = ELF32_R_TYPE(rel->r_info);
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addend = get32((uint32_t *)(text + rel->r_offset)) + rel->r_addend;
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switch(type) {
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case R_68K_32:
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fprintf(outfile, " /* R_68K_32 RELOC, offset %x */\n", rel->r_offset) ;
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fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %d) = %s + %#x;\n",
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rel->r_offset - start_offset, name, addend );
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break;
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case R_68K_PC32:
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fprintf(outfile, " /* R_68K_PC32 RELOC, offset %x */\n", rel->r_offset);
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fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %d) = %s - (long)(gen_code_ptr + %#x) + %#x;\n",
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rel->r_offset - start_offset, name, rel->r_offset - start_offset, /*sym->st_value+*/ addend);
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break;
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default:
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error("unsupported m68k relocation (%d)", type);
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}
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}
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}
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}
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#else
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#error unsupported CPU
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#endif
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8
dyngen.h
8
dyngen.h
@ -94,6 +94,14 @@ static inline void flush_icache_range(unsigned long start, unsigned long stop)
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}
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#endif
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#ifdef __mc68000
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#include <asm/cachectl.h>
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static inline void flush_icache_range(unsigned long start, unsigned long stop)
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{
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cacheflush(start,FLUSH_SCOPE_LINE,FLUSH_CACHE_BOTH,stop-start+16);
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}
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#endif
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#ifdef __alpha__
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register int gp asm("$29");
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12
exec.h
12
exec.h
@ -348,6 +348,18 @@ static inline int testandset (int *spinlock)
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}
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#endif
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#ifdef __mc68000
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static inline int testandset (int *p)
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{
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char ret;
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__asm__ __volatile__("tas %1; sne %0"
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: "=r" (ret)
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: "m" (p)
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: "cc","memory");
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return ret == 0;
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}
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#endif
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typedef int spinlock_t;
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#define SPIN_LOCK_UNLOCKED 0
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177
m68k.ld
Normal file
177
m68k.ld
Normal file
@ -0,0 +1,177 @@
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/* Script for -z combreloc: combine and sort reloc sections */
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OUTPUT_FORMAT("elf32-m68k", "elf32-m68k",
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"elf32-m68k")
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OUTPUT_ARCH(m68k)
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ENTRY(_start)
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SEARCH_DIR("/usr/local/m68k-linux/lib");
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/* Do we need any of these for elf?
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__DYNAMIC = 0; */
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SECTIONS
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{
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/* Read-only sections, merged into text segment: */
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. = 0x60000000 + SIZEOF_HEADERS;
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.interp : { *(.interp) }
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.hash : { *(.hash) }
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.dynsym : { *(.dynsym) }
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.dynstr : { *(.dynstr) }
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.gnu.version : { *(.gnu.version) }
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.gnu.version_d : { *(.gnu.version_d) }
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.gnu.version_r : { *(.gnu.version_r) }
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.rel.dyn :
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{
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*(.rel.init)
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*(.rel.text .rel.text.* .rel.gnu.linkonce.t.*)
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*(.rel.fini)
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*(.rel.rodata .rel.rodata.* .rel.gnu.linkonce.r.*)
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*(.rel.data .rel.data.* .rel.gnu.linkonce.d.*)
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*(.rel.tdata .rel.tdata.* .rel.gnu.linkonce.td.*)
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*(.rel.tbss .rel.tbss.* .rel.gnu.linkonce.tb.*)
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*(.rel.ctors)
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*(.rel.dtors)
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*(.rel.got)
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*(.rel.bss .rel.bss.* .rel.gnu.linkonce.b.*)
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}
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.rela.dyn :
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{
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*(.rela.init)
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*(.rela.text .rela.text.* .rela.gnu.linkonce.t.*)
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*(.rela.fini)
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*(.rela.rodata .rela.rodata.* .rela.gnu.linkonce.r.*)
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*(.rela.data .rela.data.* .rela.gnu.linkonce.d.*)
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*(.rela.tdata .rela.tdata.* .rela.gnu.linkonce.td.*)
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*(.rela.tbss .rela.tbss.* .rela.gnu.linkonce.tb.*)
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*(.rela.ctors)
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*(.rela.dtors)
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*(.rela.got)
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*(.rela.bss .rela.bss.* .rela.gnu.linkonce.b.*)
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}
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.rel.plt : { *(.rel.plt) }
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.rela.plt : { *(.rela.plt) }
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.init :
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{
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KEEP (*(.init))
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} =0x4e754e75
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.plt : { *(.plt) }
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.text :
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{
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*(.text .stub .text.* .gnu.linkonce.t.*)
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/* .gnu.warning sections are handled specially by elf32.em. */
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*(.gnu.warning)
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} =0x4e754e75
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.fini :
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{
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KEEP (*(.fini))
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} =0x4e754e75
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PROVIDE (__etext = .);
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PROVIDE (_etext = .);
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PROVIDE (etext = .);
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.rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) }
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.rodata1 : { *(.rodata1) }
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.eh_frame_hdr : { *(.eh_frame_hdr) }
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/* Adjust the address for the data segment. We want to adjust up to
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the same address within the page on the next page up. */
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. = ALIGN(0x2000) + (. & (0x2000 - 1));
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/* Ensure the __preinit_array_start label is properly aligned. We
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could instead move the label definition inside the section, but
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the linker would then create the section even if it turns out to
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be empty, which isn't pretty. */
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. = ALIGN(32 / 8);
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PROVIDE (__preinit_array_start = .);
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.preinit_array : { *(.preinit_array) }
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PROVIDE (__preinit_array_end = .);
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PROVIDE (__init_array_start = .);
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.init_array : { *(.init_array) }
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PROVIDE (__init_array_end = .);
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PROVIDE (__fini_array_start = .);
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.fini_array : { *(.fini_array) }
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PROVIDE (__fini_array_end = .);
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.data :
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{
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*(.data .data.* .gnu.linkonce.d.*)
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SORT(CONSTRUCTORS)
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}
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.data1 : { *(.data1) }
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.tdata : { *(.tdata .tdata.* .gnu.linkonce.td.*) }
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.tbss : { *(.tbss .tbss.* .gnu.linkonce.tb.*) *(.tcommon) }
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.eh_frame : { KEEP (*(.eh_frame)) }
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.gcc_except_table : { *(.gcc_except_table) }
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.dynamic : { *(.dynamic) }
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.ctors :
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{
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/* gcc uses crtbegin.o to find the start of
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the constructors, so we make sure it is
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first. Because this is a wildcard, it
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doesn't matter if the user does not
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actually link against crtbegin.o; the
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linker won't look for a file to match a
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wildcard. The wildcard also means that it
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doesn't matter which directory crtbegin.o
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is in. */
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KEEP (*crtbegin.o(.ctors))
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/* We don't want to include the .ctor section from
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from the crtend.o file until after the sorted ctors.
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The .ctor section from the crtend file contains the
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end of ctors marker and it must be last */
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KEEP (*(EXCLUDE_FILE (*crtend.o ) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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}
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.dtors :
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{
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KEEP (*crtbegin.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o ) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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}
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.jcr : { KEEP (*(.jcr)) }
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.got : { *(.got.plt) *(.got) }
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_edata = .;
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PROVIDE (edata = .);
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__bss_start = .;
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.bss :
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{
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*(.dynbss)
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*(.bss .bss.* .gnu.linkonce.b.*)
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*(COMMON)
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/* Align here to ensure that the .bss section occupies space up to
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_end. Align after .bss to ensure correct alignment even if the
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.bss section disappears because there are no input sections. */
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. = ALIGN(32 / 8);
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}
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. = ALIGN(32 / 8);
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_end = .;
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PROVIDE (end = .);
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/* Stabs debugging sections. */
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.stab 0 : { *(.stab) }
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.stabstr 0 : { *(.stabstr) }
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.stab.exclstr 0 : { *(.stab.exclstr) }
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.stab.index 0 : { *(.stab.index) }
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.stab.indexstr 0 : { *(.stab.indexstr) }
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.comment 0 : { *(.comment) }
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/* DWARF debug sections.
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Symbols in the DWARF debugging sections are relative to the beginning
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of the section so we begin them at 0. */
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/* DWARF 1 */
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.debug 0 : { *(.debug) }
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.line 0 : { *(.line) }
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/* GNU DWARF 1 extensions */
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.debug_srcinfo 0 : { *(.debug_srcinfo) }
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.debug_sfnames 0 : { *(.debug_sfnames) }
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/* DWARF 1.1 and DWARF 2 */
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.debug_aranges 0 : { *(.debug_aranges) }
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.debug_pubnames 0 : { *(.debug_pubnames) }
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/* DWARF 2 */
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.debug_info 0 : { *(.debug_info .gnu.linkonce.wi.*) }
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.debug_abbrev 0 : { *(.debug_abbrev) }
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.debug_line 0 : { *(.debug_line) }
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.debug_str 0 : { *(.debug_str) }
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.debug_macinfo 0 : { *(.debug_macinfo) }
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/* SGI/MIPS DWARF 2 extensions */
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.debug_weaknames 0 : { *(.debug_weaknames) }
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.debug_varnames 0 : { *(.debug_varnames) }
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}
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