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armv7m: Don't assume the NVIC's CPU is CPU 0
Currently the ARMv7M NVIC object's realize method assumes that the CPU the NVIC is attached to is CPU 0, because it thinks there can only ever be one CPU in the system. To allow a dual-Cortex-M33 setup we need to remove this assumption; instead the armv7m wrapper object tells the NVIC its CPU, in the same way that it already tells the CPU what the NVIC is. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190121185118.18550-2-peter.maydell@linaro.org
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@ -178,10 +178,12 @@ static void armv7m_realize(DeviceState *dev, Error **errp)
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}
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}
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/* Tell the CPU where the NVIC is; it will fail realize if it doesn't
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* have one.
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/*
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* Tell the CPU where the NVIC is; it will fail realize if it doesn't
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* have one. Similarly, tell the NVIC where its CPU is.
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*/
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s->cpu->env.nvic = &s->nvic;
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s->nvic.cpu = s->cpu;
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object_property_set_bool(OBJECT(s->cpu), true, "realized", &err);
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if (err != NULL) {
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@ -2274,8 +2274,7 @@ static void armv7m_nvic_realize(DeviceState *dev, Error **errp)
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Error *err = NULL;
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int regionlen;
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s->cpu = ARM_CPU(qemu_get_cpu(0));
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/* The armv7m container object will have set our CPU pointer */
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if (!s->cpu || !arm_feature(&s->cpu->env, ARM_FEATURE_M)) {
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error_setg(errp, "The NVIC can only be used with a Cortex-M CPU");
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return;
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