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SVM: added tsc_offset

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4668 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
bellard 2008-06-04 17:39:33 +00:00
parent 4f57689a8d
commit 33c263df7f
2 changed files with 8 additions and 4 deletions
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7
target-i386/cpu.h
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@ -119,9 +119,9 @@
#define ID_MASK 0x00200000
/* hidden flags - used internally by qemu to represent additional cpu
states. Only the CPL and INHIBIT_IRQ are not redundant. We avoid
using the IOPL_MASK, TF_MASK and VM_MASK bit position to ease oring
with eflags. */
states. Only the CPL, INHIBIT_IRQ, SMM and SVMI are not
redundant. We avoid using the IOPL_MASK, TF_MASK and VM_MASK bit
position to ease oring with eflags. */
/* current cpl */
#define HF_CPL_SHIFT 0
/* true if soft mmu is being used */
@ -543,6 +543,7 @@ typedef struct CPUX86State {
target_phys_addr_t vm_hsave;
target_phys_addr_t vm_vmcb;
uint64_t tsc_offset;
uint64_t intercept;
uint16_t intercept_cr_read;
uint16_t intercept_cr_write;

5
target-i386/op_helper.c
View File

@ -3005,7 +3005,7 @@ void helper_rdtsc(void)
}
helper_svm_check_intercept_param(SVM_EXIT_RDTSC, 0);
val = cpu_get_tsc(env);
val = cpu_get_tsc(env) + env->tsc_offset;
EAX = (uint32_t)(val);
EDX = (uint32_t)(val >> 32);
}
@ -4851,6 +4851,8 @@ void helper_vmrun(int aflag, int next_eip_addend)
/* enable intercepts */
env->hflags |= HF_SVMI_MASK;
env->tsc_offset = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, control.tsc_offset));
env->gdt.base = ldq_phys(env->vm_vmcb + offsetof(struct vmcb, save.gdtr.base));
env->gdt.limit = ldl_phys(env->vm_vmcb + offsetof(struct vmcb, save.gdtr.limit));
@ -5226,6 +5228,7 @@ void helper_vmexit(uint32_t exit_code, uint64_t exit_info_1)
env->intercept = 0;
env->intercept_exceptions = 0;
env->interrupt_request &= ~CPU_INTERRUPT_VIRQ;
env->tsc_offset = 0;
env->gdt.base = ldq_phys(env->vm_hsave + offsetof(struct vmcb, save.gdtr.base));
env->gdt.limit = ldl_phys(env->vm_hsave + offsetof(struct vmcb, save.gdtr.limit));