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qdev/isa: convert real time clock

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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
This commit is contained in:
Gerd Hoffmann 2009-09-10 11:43:35 +02:00 committed by malc
parent 11d23c352d
commit 32e0c8260d
7 changed files with 38 additions and 18 deletions
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43
hw/mc146818rtc.c
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@ -63,10 +63,11 @@
#define REG_C_AF 0x20 #define REG_C_AF 0x20
struct RTCState { struct RTCState {
ISADevice dev;
uint8_t cmos_data[128]; uint8_t cmos_data[128];
uint8_t cmos_index; uint8_t cmos_index;
struct tm current_tm; struct tm current_tm;
int base_year; int32_t base_year;
qemu_irq irq; qemu_irq irq;
qemu_irq sqw_irq; qemu_irq sqw_irq;
int it_shift; int it_shift;
@ -589,20 +590,19 @@ static void rtc_reset(void *opaque)
#endif #endif
} }
RTCState *rtc_init_sqw(int base, qemu_irq irq, qemu_irq sqw_irq, int base_year) static int rtc_initfn(ISADevice *dev)
{ {
RTCState *s; RTCState *s = DO_UPCAST(RTCState, dev, dev);
int base = 0x70;
int isairq = 8;
s = qemu_mallocz(sizeof(RTCState)); isa_init_irq(dev, &s->irq, isairq);
s->irq = irq;
s->sqw_irq = sqw_irq;
s->cmos_data[RTC_REG_A] = 0x26; s->cmos_data[RTC_REG_A] = 0x26;
s->cmos_data[RTC_REG_B] = 0x02; s->cmos_data[RTC_REG_B] = 0x02;
s->cmos_data[RTC_REG_C] = 0x00; s->cmos_data[RTC_REG_C] = 0x00;
s->cmos_data[RTC_REG_D] = 0x80; s->cmos_data[RTC_REG_D] = 0x80;
s->base_year = base_year;
rtc_set_date_from_host(s); rtc_set_date_from_host(s);
s->periodic_timer = qemu_new_timer(vm_clock, s->periodic_timer = qemu_new_timer(vm_clock,
@ -628,15 +628,36 @@ RTCState *rtc_init_sqw(int base, qemu_irq irq, qemu_irq sqw_irq, int base_year)
register_savevm("mc146818rtc-td", base, 1, rtc_save_td, rtc_load_td, s); register_savevm("mc146818rtc-td", base, 1, rtc_save_td, rtc_load_td, s);
#endif #endif
qemu_register_reset(rtc_reset, s); qemu_register_reset(rtc_reset, s);
return 0;
return s;
} }
RTCState *rtc_init(int base, qemu_irq irq, int base_year) RTCState *rtc_init(int base_year)
{ {
return rtc_init_sqw(base, irq, NULL, base_year); ISADevice *dev;
dev = isa_create("mc146818rtc");
qdev_prop_set_int32(&dev->qdev, "base_year", base_year);
qdev_init(&dev->qdev);
return DO_UPCAST(RTCState, dev, dev);
} }
static ISADeviceInfo mc146818rtc_info = {
.qdev.name = "mc146818rtc",
.qdev.size = sizeof(RTCState),
.qdev.no_user = 1,
.init = rtc_initfn,
.qdev.props = (Property[]) {
DEFINE_PROP_INT32("base_year", RTCState, base_year, 1980),
DEFINE_PROP_END_OF_LIST(),
}
};
static void mc146818rtc_register(void)
{
isa_qdev_register(&mc146818rtc_info);
}
device_init(mc146818rtc_register)
/* Memory mapped interface */ /* Memory mapped interface */
static uint32_t cmos_mm_readb (void *opaque, target_phys_addr_t addr) static uint32_t cmos_mm_readb (void *opaque, target_phys_addr_t addr)
{ {

2
hw/mips_jazz.c
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@ -241,7 +241,7 @@ void mips_jazz_init (ram_addr_t ram_size,
fdctrl_init_sysbus(rc4030[1], 0, 0x80003000, fds); fdctrl_init_sysbus(rc4030[1], 0, 0x80003000, fds);
/* Real time clock */ /* Real time clock */
rtc_init(0x70, i8259[8], 1980); rtc_init(1980);
s_rtc = cpu_register_io_memory(rtc_read, rtc_write, env); s_rtc = cpu_register_io_memory(rtc_read, rtc_write, env);
cpu_register_physical_memory(0x80004000, 0x00001000, s_rtc); cpu_register_physical_memory(0x80004000, 0x00001000, s_rtc);

2
hw/mips_malta.c
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@ -923,7 +923,7 @@ void mips_malta_init (ram_addr_t ram_size,
/* Super I/O */ /* Super I/O */
isa_dev = isa_create_simple("i8042"); isa_dev = isa_create_simple("i8042");
rtc_state = rtc_init(0x70, isa_reserve_irq(8), 2000); rtc_state = rtc_init(2000);
serial_init(0x3f8, isa_reserve_irq(4), 115200, serial_hds[0]); serial_init(0x3f8, isa_reserve_irq(4), 115200, serial_hds[0]);
serial_init(0x2f8, isa_reserve_irq(3), 115200, serial_hds[1]); serial_init(0x2f8, isa_reserve_irq(3), 115200, serial_hds[1]);
if (parallel_hds[0]) if (parallel_hds[0])

2
hw/mips_r4k.c
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@ -244,7 +244,7 @@ void mips_r4k_init (ram_addr_t ram_size,
isa_bus_new(NULL); isa_bus_new(NULL);
isa_bus_irqs(i8259); isa_bus_irqs(i8259);
rtc_state = rtc_init(0x70, i8259[8], 2000); rtc_state = rtc_init(2000);
/* Register 64 KB of ISA IO space at 0x14000000 */ /* Register 64 KB of ISA IO space at 0x14000000 */
isa_mmio_init(0x14000000, 0x00010000); isa_mmio_init(0x14000000, 0x00010000);

2
hw/pc.c
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@ -1313,7 +1313,7 @@ static void pc_init1(ram_addr_t ram_size,
} }
} }
rtc_state = rtc_init(0x70, isa_reserve_irq(8), 2000); rtc_state = rtc_init(2000);
qemu_register_boot_set(pc_boot_set, rtc_state); qemu_register_boot_set(pc_boot_set, rtc_state);

3
hw/pc.h
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@ -81,8 +81,7 @@ void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
typedef struct RTCState RTCState; typedef struct RTCState RTCState;
RTCState *rtc_init(int base, qemu_irq irq, int base_year); RTCState *rtc_init(int base_year);
RTCState *rtc_init_sqw(int base, qemu_irq irq, qemu_irq sqw_irq, int base_year);
RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq, RTCState *rtc_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
int base_year); int base_year);
void rtc_set_memory(RTCState *s, int addr, int val); void rtc_set_memory(RTCState *s, int addr, int val);

2
hw/ppc_prep.c
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@ -680,7 +680,7 @@ static void ppc_prep_init (ram_addr_t ram_size,
pci_vga_init(pci_bus, 0, 0); pci_vga_init(pci_bus, 0, 0);
// openpic = openpic_init(0x00000000, 0xF0000000, 1); // openpic = openpic_init(0x00000000, 0xF0000000, 1);
// pit = pit_init(0x40, i8259[0]); // pit = pit_init(0x40, i8259[0]);
rtc_init(0x70, i8259[8], 2000); rtc_init(2000);
serial_init(0x3f8, i8259[4], 115200, serial_hds[0]); serial_init(0x3f8, i8259[4], 115200, serial_hds[0]);
nb_nics1 = nb_nics; nb_nics1 = nb_nics;